參數(shù)資料
型號(hào)： X4043S8IZ
廠商： INTERSIL CORP
元件分類： 電源管理
英文描述： RTC Module With CPU Supervisor
中文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝： GREEN, PLASTIC, SOIC-8
文件頁(yè)數(shù)： 2/25頁(yè)
文件大?。?/td> 144K
代理商： X4043S8IZ
X4043/45
Characteristics subject to change without notice.
2 of 25
REV 1.1.17 9/14/01
www.xicor.com
The memory portion of the device is a CMOS Serial
EEPROM array with Xicor’s block lock
array is internally organized as x 8. The device features
an 2-wire interface and software protocol allowing
operation on an I
C bus.
protection. The
2
The device utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 1,000,000
cycles and a minimum data retention of 100 years.
PIN CONFIGURATION
NC
V
SS
V
CC
WP
SDA
SCL
3
4
2
1
6
5
7
8
NC
RESET
8-Pin JEDEC SOIC, MSOP, PDIP
Pin
(SOIC/MSOP/DIP)
1
2
3
Name
NC
NC
RESET/
RESET
Function
No internal connections
No internal connections
Reset Output
whenever V
CC
for t
PURST
. RESET/RESET goes active if the Watchdog Timer is enabled and SDA
remains either HIGH or LOW longer than the selectable Watchdog time out period.
RESET/RESET goes active on power up and remains active for 250ms after the
power supply stabilizes. RESET is an active high open drain output. An external pull
up resistor is required on the RESET/RESET pin.
Ground
Serial Data.
SDA is a bidirectional pin used to transfer data into and out of the
device. It has an open drain output and may be wire ORed with other open drain or
open collector outputs. This pin requires a pull up resistor and the input buffer is
always active (not gated).
Serial Clock.
The Serial Clock input controls the serial bus timing for data input and
output.
Write Protect.
WP HIGH prevents writes to any location in the device (including the
control register). Connect WP pin to V
SS
when it is not used.
Supply Voltage
.
falls below V
RESET is an active LOW, open drain output which goes active
TRIP
. It will remain active until V
CC
rises above the V
TRIP
4
5
V
SDA
SS
6
SCL
7
WP
8
V
CC
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