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參數(shù)資料
| 型號： | 11274-001-XTP |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 28 MHz, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 2/43頁 |
| 文件大小： | 1343K |
| 代理商： | 11274-001-XTP |
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FS6131-01/FS6131-01g Programmable Line Lock Clock Generator IC
Data Sheet
4.4.1 VCXO Tuning
The VCXO may be coarse tuned by a programmable adjustment of the crystal load capacitance via the XCT[3:0] control bits. See Table
11 for the control code and the associated loading capacitance.
The actual amount of frequency warping caused by the tuning capacitance will depend on the crystal used. The VCXO tuning
capacitance includes an external 6pF load capacitance (12pF from the XIN pin to ground and 12pF from the XOUT pin to ground). The
fine tuning capability of the VCXO can be enabled by setting the XLVTEN bit to a one, or disabled by setting it to a zero.
Figure 11 shows the typical effect of the coarse and fine tuning mechanisms. The total coarse tune range is about 350ppm. The
difference in VCXO frequency in parts per million (ppm) is shown as the fine tuning voltage on the XTUNE pin varies from 0V to 5V.
Note that as the crystal load capacitance is increased the VCXO frequency is pulled somewhat less with each coarse step, and the fine
tuning range decreases. The fine tuning range always overlaps a few coarse tuning ranges, eliminating the possibility of holes in the
VCXO response. The different crystal warping characteristics may change the scaling on the Y-axis, but not the overall characteristic of
the curves.
VCXO Range (ppm) vs. XTUNE Voltage (V)
-200
-150
-100
-50
0
50
100
150
200
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Coarse Tune Setting XCT[3:0]
VCXO
Range
(ppm)
XTUNE Voltage = 0.0V
XTUNE Voltage = 5.0V
Figure 11: VCXO Coarse and Fine Tuning
4.5 Crystal Loop
The crystal loop is designed to attenuate the jitter on a highly jittered, low-Q, low frequency reference. The crystal loop can also
maintain a constant frequency output into the main loop if the low frequency reference is intermittent.
The crystal loop consists of a voltage-controllable crystal oscillator (VCXO), a divider, a PFD, and a charge pump that tunes the VCXO
to a frequency reference. The frequency reference is phase-locked to the divided frequency of an external, high-Q, jitter-free crystal,
thereby locking the VCXO to the reference frequency. The VCXO can continue to run off the crystal even if the frequency reference
becomes intermittent.
4.5.1 Locking to an External Frequency Source
When the crystal loop is synchronized to an external frequency source, the FS6131 can monitor the crystal loop and detect if the loop
unlocks from the external source. The crystal loop tries to drive to zero frequency if the external source is dropped, and sets a lock
status error flag.
The crystal loop can also detect if the VCXO has dropped out of the fine tune range, requiring a change to the coarse tune. The lock
status also latches the direction the loop went out of range (high or low) when the loop became unlocked.
10
AMI Semiconductor – Rev. 3.0, Jan. 08
www.amis.com
Specifications subject to change without notice
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