參數(shù)資料
型號(hào): 935272029125
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: LVC/LCX/Z SERIES, 1-INPUT NON-INVERT GATE, PDSO5
封裝: PLASTIC, SOT-753, SC-74A, 5 PIN
文件頁數(shù): 14/19頁
文件大?。?/td> 137K
代理商: 935272029125
2003 Mar 07
4
Philips Semiconductors
Product specication
Buffer with open-drain output
74LVC1G07
handbook, halfpage
MNA624
4
2
A
Y
Fig.3 IEC logic symbol.
handbook, halfpage
MNA625
A
Y
GND
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
1.65
5.5
V
VI
input voltage
0
5.5
V
VO
output voltage
active mode
0
5.5
V
VCC = 0 V; Power-down mode
0
5.5
V
Tamb
operating ambient temperature
40
+125
°C
tr, tf
input rise and fall times
VCC = 1.65 to 2.7 V
0
20
ns/V
VCC = 2.7 to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
0.5
+6.5
V
IIK
input diode current
VI <0
50
mA
VI
input voltage
note 1
0.5
+6.5
V
IOK
output diode current
VO >VCC or VO <0
±50
mA
VO
output voltage
active mode; notes 1 and 2
0.5
+6.5
V
Power-down mode; notes 1 and 2
0.5
+6.5
V
IO
output source or sink current
VO =0toVCC
±50
mA
ICC, IGND
VCC or GND current
±100
mA
Tstg
storage temperature
65
+150
°C
PD
power dissipation
Tamb = 40 to +125 °C
250
mW
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