參數(shù)資料
型號(hào): AD9432BSVZ-80
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/16頁(yè)
文件大小: 0K
描述: IC ADC 12BIT 80MSPS 52TQFP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 52-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 52-TQFP-EP(10x10)
包裝: 托盤(pán)
輸入數(shù)目和類(lèi)型: 2 個(gè)單端,單極;2 個(gè)差分,單極
12-Bit, 80 MSPS/105 MSPS ADC
AD9432
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2002–2009 Analog Devices, Inc. All rights reserved.
FEATURES
On-chip reference and track-and-hold
On-chip input buffer
Power dissipation: 850 mW typical at 105 MSPS
500 MHz analog bandwidth
SNR: 67 dB @ 49 MHz AIN at 105 MSPS
SFDR: 80 dB @ 49 MHz AIN at 105 MSPS
2.0 V p-p analog input range
5.0 V supply operation
3.3 V CMOS/TTL outputs
Twos complement output format
APPLICATIONS
Communications
Base stations and zero-IF subsystems
Wireless local loop (WLL)
Local multipoint distribution service (LMDS)
HDTV broadcast cameras and film scanners
GENERAL INTRODUCTION
The AD9432 is a 12-bit, monolithic sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit and is
optimized for high speed conversion and ease of use. The prod-
uct operates up to a 105 MSPS conversion rate with outstanding
dynamic performance over its full operating range.
The ADC requires only a single 5.0 V power supply and a 105 MHz
encode clock for full performance operation. No external refer-
ence or driver components are required for many applications.
The digital outputs are TTL-/CMOS-compatible, and a separate
output power supply pin supports interfacing with 3.3 V logic.
The encode input supports either differential or single-ended
mode and is TTL-/CMOS-compatible.
Fabricated on an advanced BiCMOS process, the AD9432 is
available in a 52-lead low profile quad flat package (LQFP) and
in a 52-lead thin quad flat package (TQFP_EP). The AD9432 is
specified over the industrial temperature range of 40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
12
T/H
BUF
PIPELINE
ADC
REF
TIMING
OUTPUT
STAGING
AD9432
VCC
VDD
GND
VREFOUT
VREFIN
D11 TO D0
OR
ENCODE
AIN
005
87
-00
1
Figure 1.
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