參數(shù)資料
型號: ADM1024ARU
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Circular Connector; No. of Contacts:8; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:17-8
中文描述: 9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
封裝: MO-153AD, TSSOP-24
文件頁數(shù): 21/28頁
文件大?。?/td> 285K
代理商: ADM1024ARU
ADM1024
–21–
REV. 0
USING THE CONFIGURATION REGISTERS
Control of the ADM1024 is provided through two configuration
registers. The ADC is stopped upon power-up, and the
INT
_Clear
signal is asserted, clearing the
INT
output. The Configuration
Registers are used to start and stop the ADM1024; enable or dis-
able interrupt outputs and modes, and provide the initialization
function described above.
Bit 0 of Configuration Register 1 controls the monitoring loop
of the ADM1024. Setting Bit 0 low stops the monitoring loop
and puts the ADM1024 into a low power mode thereby reducing
power consumption. Serial bus communication is still possible
with any register in the ADM1024 while in low-power mode.
Setting Bit 0 high starts the monitoring loop.
Bit 1 of Configuration Register 1 enables or disables the
INT
Interrupt output. Setting Bit 1 high enables the
INT
output,
setting Bit 1 low disables the output.
Bit 2 of Configuration Register 1 enables or disables the
THERM
output. Setting Bit 1 high enables the
INT
output, setting Bit 1
low disables the output.
Bit 3 of Configuration Register 1 is used to clear the
INT
inter-
rupt output when set high. The ADM1024 monitoring function
will stop until Bit 3 is set low. Interrupt Status register contents
will not be affected.
Bit 4 of Configuration Register 1 causes a low-going 45 ms (typ)
pulse at the
RESET
pin (Pin 12).
Bit 6 of Configuration Register 1 is used to clear an interrupt at
the
THERM
output when it is set to 1.
Bit 7 of Configuration Register 1 is used to start a Configuration
Register Initialization when it is set to 1.
Bit 0 of Configuration Register 2 is used to mask temperature
interrupts at the
INT
output when it is set to 1. The
THERM
output is unaffected by this bit.
Bits 1 and 2 of Configuration Register 2 lock the values stored
in the Local and Remote Fan Control Registers at addresses 13h
and 14h. The values in these registers cannot be changed until a
power-on reset is performed.
Bit 3 of Configuration Register 2 selects the
THERM
interrupt
mode. The default value of 0 selects one-time mode. Setting this
bit to 1 selects ACPI mode.
STARTING CONVERSION
The monitoring function (analog inputs, temperature, and fan
speeds) in the ADM1024 is started by writing to Configuration
Register 1 and setting Start (Bit 0), high. The
INT
_Enable (Bit
1) should be set to 1, and
INT
Clear (Bit 3) set to 0 to enable
interrupts. The
THERM
enable bit (Bit 2) should be set to 1
and the
THERM
Clear bit (Bit 6) should be set to 0 to enable
temperature interrupts at the
THERM
pin. Apart from initially
starting together, the analog measurements and fan speed mea-
surements proceed independently, and are not synchronized in
any way.
The time taken to complete the analog measurements depends
on how they are configured, as described elsewhere. The time
taken to complete the fan speed measurements depends on the
fan speed and the number of tach output pulses per revolution.
Once the measurements have been completed, the results can be
read from the Value Registers at any time.
REDUCED POWER AND SHUTDOWN MODE
The ADM1024 can be placed in a low-power mode by setting
Bit 0 of the Configuration Register to 0. This disables the inter-
nal ADC. Full shutdown mode may then be achieved by setting
Bit 0 of the Test Register to 1. This turns off the analog output
and stops the monitoring cycle, if running, but it does not affect
the condition of any of the registers. The device will return to its
previous state when this bit is reset to zero.
APPLICATION CIRCUIT
Figure 25 shows a generic application circuit using the ADM1024.
The analog monitoring inputs are connected to the power
supplies including two processor core voltage inputs. The VID
inputs are connected to the processor voltage ID pins. There are
two tach inputs from fans, and the analog output is used to control
the speed of a third fan. An opto-sensor for chassis intrusion
detection is connected to the CI input. Of course, in an actual
application, every input and output may not be used, in which
case unused analog and digital inputs should be tied to analog
or digital ground as appropriate.
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