參數(shù)資料
型號: ADM1024ARU
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Circular Connector; No. of Contacts:8; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:17-8
中文描述: 9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
封裝: MO-153AD, TSSOP-24
文件頁數(shù): 25/28頁
文件大?。?/td> 285K
代理商: ADM1024ARU
ADM1024
–25–
REV. 0
Table IX. Register 40h, Configuration Register 1 (Power-On Default = 08h)
Bit
Name
R/
W
Description
0
START
R/
W
Logic 1 enables start-up of ADM1024, logic 0 places it in standby mode. Caution: The outputs of
the interrupt pins will not be cleared if the user writes a zero to this location after an interrupt has
occurred (see “
INT
Clear” bit). At start-up, limit checking functions and scanning begins. Note, all
high and low limits should be set into the ADM1024 prior to turning on this bit. (Power-Up Default = 0)
Logic 1 enables the
INT
_output. 1 = Enabled 0 = Disabled (Power-Up Default = 0).
0 =
THERM
disabled.
1 =
THERM
enabled.
During Interrupt Service Routine (ISR) this bit is asserted Logic 1 to clear INT output without
affecting the contents of the Interrupt Status Register. The device will stop monitoring. It will resume
upon clearing of this bit. (Power-Up Default = 0)
Setting this bit generates a low-going 45 ms reset pulse at Pin 12. This bit is self-clearing and power-
up default is 0.
Default = 0.
A one clears the
THERM
output without changing the Status Register contents.
Logic 1 restores Power-Up default values to the Configuration register, Interrupt status registers,
Interrupt Mask Registers, Fan Divisor Register, and the Temperature Configuration Register. This bit
automatically clears itself since the power-on default is zero.
1
2
INT
_Enable
THERM
Enable
INT
_Clear
R/
W
R/
W
3
R/
W
4
RESET
R/
W
5
6
7
Reserved
THERM
CLR R/
W
Initialization
R/
W
R/
W
Table X. Register 41h, Interrupt Status Register 1 (Power-On Default = 00h)
Bit
Name
R/
W
Description
0
1
2
3
4
2.5 V/External Temp2 Error
V
CCP1
Error
V
CC
Error
5 V Error
Internal Temp Error
Read Only
Read Only
Read Only
Read Only
Read Only
A one indicates that a High or Low limit has been exceeded.
A one indicates that a High or Low limit has been exceeded.
A one indicates that a High or Low limit has been exceeded.
A one indicates that a High or Low limit has been exceeded.
A one indicates that a temperature interrupt has been set, or that a High or
Low limit has been exceeded.
A one indicates that a temperature interrupt has been set, or that a High or
Low limit has been exceeded.
A one indicates that a High or Low limit has been exceeded.
A one indicates that a High or Low limit has been exceeded.
5
External Temp1 Error
Read Only
6
7
FAN1/AIN1 Error
FAN2/AIN2 Error
Read Only
Read Only
Table XI. Register 42h, Interrupt Status Register 2 (Power-On Default = 00h)
Bit
Name
R/
W
Description
0
1
2
3
4
5
6
7
12 V Error
V
CCP2
Error
Reserved
Reserved
Chassis Error
THERM
Interrupt
D1 Fault
D2 Fault
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
Undefined.
Undefined.
A one indicates Chassis Intrusion has gone high.
Indicates that
THERM
pin has been pulled low by an external source.
Short or open-circuit sensor diode D1.
Short or open-circuit sensor diode D2.
NOTES
1. Any time the STATUS Register is read out, the conditions (i.e., Register) that are read are automatically reset. In the case of the channel priority indication, if two
or more channels were out of limits, then another indication would automatically be generated if it was not handled during the ISR.
2. In the Mask Register, the errant voltage interrupt may be disabled, until the operator has time to clear the errant condition or set the limit higher/lower.
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