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參數(shù)資料
| 型號(hào)： | ADM1024ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Circular Connector; No. of Contacts:8; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:17-8 |
| 中文描述： | 9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24 |
| 封裝： | MO-153AD, TSSOP-24 |
| 文件頁(yè)數(shù)： | 3/28頁(yè) |
| 文件大小： | 285K |
| 代理商： | ADM1024ARU |
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–3–
REV. 0
ADM1024
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SERIAL BUS DIGITAL INPUTS
(SCL, SDA)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
Glitch Immunity
2.2
V
V
mV
ns
0.8
500
100
DIGITAL INPUT LOGIC LEVELS
(ADD, CI,
RESET
, VID0–VID4, FAN1, FAN2)
Input High Voltage, V
IH
Input Low Voltage, V
IL
NTEST_IN
Input High Voltage, V
IH
DIGITAL INPUT CURRENT
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
SERIAL BUS TIMING
8
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
Start Setup Time, t
SU;STA
Start Hold Time, t
HD;STA
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
r
SCL, SDA Fall Time, t
f
Data Setup Time, t
SU;DAT
Data Hold Time, t
HD;DAT
(See Note 7)
2.2
V
V
V
CC
= 2.85 V – 5.5 V
V
CC
= 2.85 V – 5.5 V
0.8
2.2
V
V
CC
= 2.85 V – 5.5 V
–1
μ
A
μ
A
pF
V
IN
= V
CC
V
IN
= 0
1
20
400
50
kHz
ns
μ
s
ns
ns
μ
s
μ
s
ns
μ
s
ns
ns
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
1.3
600
600
1.3
0.6
300
300
100
900
NOTES
1
All voltages are measured with respect to GND, unless otherwise specified.
2
Typicals are at T
A
= 25
°
C and represent most likely parametric norm. Shutdown current typ is measured with V
CC
= 3.3 V.
3
TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input
protection resistor value between zero and 1 k
.
4
Total monitoring cycle time is nominally
m
×
755
μ
s +
n
×
33244
μ
s, where
m
is the number of channels configured as analog inputs, plus two for the internal V
CC
measurement and internal temperature sensor, and
n
is the number of channels configured as external temperature channels (D1 and D2).
5
The total fan count is based on two pulses per revolution of the fan tachometer output.
6
Open-drain digital outputs may have an external pull-up resistor connected to a voltage lower or higher than V
CC
(up to 6.5 V absolute maximum).
7
All logic inputs except ADD are tolerant of 5 V logic levels, even if V
CC
is less than 5 V. ADD is a three-state input that may connected to V
CC
, GND, or left open-circuit.
8
Timing specifications are tested at logic levels of V
IL
= 0.8 V for a falling edge and V
IH
= 2.2 V for a rising edge.
Specifications subject to change without notice.
P
S
P
t
HD;STA
t
SU;STA
t
SU;DAT
t
HIGH
t
F
t
HD;DAT
t
R
t
LOW
t
HD;STA
t
BUF
S
SCL
SDA
t
SU;STO
Figure 1. Diagram for Serial Bus Timing
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