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| 型號： | ADSP-21160N |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護 |
| 文件頁數(shù)： | 5/53頁 |
| 文件大?。?/td> | 1680K |
| 代理商： | ADSP-21160N |
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog
Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
5
REV. PrB
For current information contact Analog Devices at 800/262-5643
ADSP-21160N
April 2002
PRELIMINARY TECHNICAL DATA
transfers). Programs can be downloaded to the
ADSP-21160N using DMA transfers. Asynchronous
off-chip peripherals can control two DMA channels using
DMA Request/Grant lines (
DMAR1–2
,
DMAG1–2
).
Other DMA features include interrupt generation upon
completion of DMA transfers, two-dimensional DMA, and
DMA chaining for automatic linked DMA transfers.
Multiprocessing
The ADSP-21160N offers powerful features tailored to
multiprocessing DSP systems as shown in
Figure 4
. The
external port and link ports provide integrated glueless mul-
tiprocessing support.
The external port supports a unified address space (see
Figure 2
) that allows direct interprocessor accesses of each
ADSP-21160N’s internal memory. Distributed bus arbitra-
tion logic is included on-chip for simple, glueless connection
of systems containing up to six ADSP-21160Ns and a host
processor. Master processor changeover incurs only one
cycle of overhead. Bus arbitration is selectable as either fixed
or rotating priority. Bus lock allows indivisible read-mod-
ify-write sequences for semaphores. A vector interrupt is
provided for interprocessor commands. Maximum
throughput for interprocessor data transfer is 380M bytes/s
over the external port. Broadcast writes allow simultaneous
transmission of data to all ADSP-21160Ns and can be used
to implement reflective semaphores.
Six link ports provide for a second method of multiprocess-
ing communications. Each link port can support
communications to another ADSP-21160N. Using the
links, a large multiprocessor system can be constructed in a
2D or 3D fashion. Systems can use the link ports and cluster
multiprocessing concurrently or independently.
Link Ports
The ADSP-21160N features six 8-bit link ports that provide
additional I/O capabilities. With the capability of running
at 95 MHz rates, each link port can support 95M bytes/s.
Link port I/O is especially useful for point-to-point inter-
processor communication in multiprocessing systems. The
link ports can operate independently and simultaneously.
Link port data is packed into 48- or 32-bit words, and can
be directly read by the core processor or DMA-transferred
to on-chip memory. Each link port has its own double-buff-
ered input and output registers. Clock/acknowledge
handshaking controls link port transfers. Transfers are pro-
grammable as either transmit or receive.
Serial Ports
The ADSP-21160N features two synchronous serial ports
that provide an inexpensive interface to a wide variety of
digital and mixed-signal peripheral devices. The serial ports
can operate up to half the clock rate of the core, providing
each with a maximum data rate of 47.5M bit/s. Independent
transmit and receive functions provide greater flexibility for
serial communications. Serial port data can be automati-
Figure 2. ADSP-21160N Memory Map
0x00 0000
0x02 0000
0x04 0000
0x08 0000
0x10 0000
0x20 0000
0x30 0000
0x40 0000
0x50 0000
0x60 0000
0x70 0000
0x7F FFFF
0x80 0000
0xFFFF FFFF
Internal
Memory
Space
External
Memory
Space
IOP Reg’s
Long Word
Normal Word
Short Word
Internal
Memory
Space
(ID = 001)
Internal
Memory
Space
(ID = 010)
Internal
Space
Internal
Memory
Space
(ID = 100)
Internal
Memory
Space
(ID = 101)
Internal
Memory
Space
(ID = 110)
Broadcast
Write to
All DSPs
(ID = 111)
Bank 0
Bank 1
Bank 2
Bank 3
Nonbanked
MS
0
MS
1
MS
2
MS
3
Memory
(ID = 011)
Multiprocessor
Memory
Space
Figure 3. ADSP-21160N External Data Alignment
Options
DATA63–0
63
55
47
39
31
23
15
7
0
RDH
/
WRH
RDL
/
WRL
EPROM
16-BIT PACKED
32-BIT PACKED
64-BIT TRANSFER FOR 40-BIT EXTENDED PRECISION
64-BIT TRANSFER FOR 48-BIT INSTRUCTION FETCH
RESTRICTED DMA, HOST, EPROM DATA ALIGNMENTS:
64-BIT LONG WORD, SIMD, DMA, IOP REGISTER TRANSFERS
BYTE 0
BYTE 7
32-BIT NORMAL WORD (EVEN ADDRESS)
32-BIT NORMAL WORD (ODD ADDRESS)
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| ADSP-21160NCB-100 | 功能描述:IC DSP CONTROLLER 32BIT 400BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21160NCB-TBD | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-21160NCBZ-100 | 功能描述:IC DSP CONTROLLER 32BIT 400-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21160NCE-100 | 制造商:Analog Devices 功能描述: |
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