FN7177.2 March 31, 2011 FIGURE 27. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V " />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� EL5246CY-T13
寤犲晢锛� Intersil
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 3/24闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC AMP DUAL 100MHZ 10-MSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 2,500
鏀惧ぇ鍣ㄩ鍨嬶細 闆诲鍙嶉
闆昏矾鏁�(sh霉)锛� 2
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 200 V/µs
澧炵泭甯跺绌嶏細 60MHz
-3db甯跺锛� 100MHz
闆绘祦 - 杓稿叆鍋忓锛� 2nA
闆诲 - 杓稿叆鍋忕Щ锛� 25000µV
闆绘祦 - 闆绘簮锛� 7mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 120mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 4.75 V ~ 5.25 V锛�±2.38 V ~ 2.63 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 10-MSOP
鍖呰锛� 甯跺嵎 (TR)
11
FN7177.2
March 31, 2011
FIGURE 27. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V
FIGURE 28. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V
FIGURE 29. DIFFERENTIAL GAIN FOR RL TIED TO 0V
FIGURE 30. DIFFERENTIAL PHASE FOR RL TIED TO 0V
FIGURE 31. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V
FIGURE 32. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V
Typical Performance Curves
0.5
2.0
VOUT (V)
3.5
DIFFERENTIAL
GAIN
(%)
0
0.1
-0.1
-0.2
0.2
RF = 0惟
AV = 1
RL = 10k惟
RL = 150惟
0.5
2.0
VOUT (V)
3.5
DIF
F
ERE
N
T
IAL
P
HASE
(掳)
0
0.1
-0.1
-0.2
0.2
RF = 0惟
AV = 1
RL = 10k惟
RL = 150惟
0.5
2.0
VOUT (V)
3.5
D
IF
F
ER
EN
T
IA
L
GA
IN
(%
)
0
0.1
-0.1
-0.2
0.2
RL=10k惟
RL=150惟
RF = 1k惟
AV = 2
0.5
2.0
VOUT (V)
3.5
DIFFERENTIA
L
PHASE
(掳
)
0
0.1
-0.1
-0.2
0.2
RL = 10k惟
RL = 150惟
RF = 1k惟
AV = 2
0.5
2.0
VOUT (V)
3.5
DI
FFEREN
T
IAL
GAI
N
(%
)
0
0.1
-0.1
-0.2
0.2
RL = 10k惟
RL = 150惟
RF = 1k惟
AV = 2
0.5
2.0
VOUT (V)
3.5
DIFFERENTIAL
PHASE
(掳
)
0
0.1
-0.1
-0.2
0.2
RL = 10k惟
RL = 150惟
RF = 1k惟
AV = 2
EL5144, EL5146, EL5244, EL5246, EL5444
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
EL5246CY IC AMP DUAL 100MHZ 10-MSOP
953404-6602-AR CONN SOCKET 4POS 2MM VERT T/H
950408-6102-AR CONN SOCKET 8POS 2MM VERT T/H
NPTC211KFXC-RC CONN FEMALE 21POS .1" SMD TIN
NPTC201KFXC-RC CONN FEMALE 20POS .1" SMD TIN
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ATmega649V-8MU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 64K FLASH 2K EE 4K SRAM ADC LCD RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA649V-8MUR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 64KB FLSH 2KB EE 4KB SRAM LCD8MHz1.8V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA64A-AN 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16MHz 105C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA64A-ANR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16MHz 105C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA64A-AU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64K Flsh 2K EEPROM 4K SRAM 16MHz RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
鐧�(f膩)甯冪穵鎬ラ噰璩�(g貌u)锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣(g貌u)闇€姹�

(鑻ュ彧閲囪臣(g貌u)涓€姊濆瀷铏�(h脿o)锛屽～瀵�(xi臎)涓€琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩�(g貌u)銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩�(g貌u)銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣(g貌u)

鎴戠殑鑱�(li谩n)绯绘柟寮�

*
*
*
    • 鎴�
    • 閲囪喘
    • 鎼滅储
    • 浼氬憳