STM8S105S6T6C

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3．退貨說(shuō)明：一周之內(nèi)提出申請(qǐng) 、無(wú)上機(jī)、不剪腳、保持原包裝；無(wú)質(zhì)量問(wèn)題不接受退貨；產(chǎn)品價(jià)格下跌時(shí)，扣除下跌部分差價(jià)；憑原送貨單或收據(jù)；      The STM8S105xx access line 8-bit microcontrollers offer from 16 to 32 Kbytes Flash program memory, plus integrated true data EEPROM. They are referred to as medium-density devices in the STM8S microcontroller family reference manual (RM0016).

All devices of the STM8S105xx access line provide the following benefits: reduced system cost, performance and robustness, short development cylces, and product longevity.

The system cost is reduced thanks to an integrated true data EEPROM for up to 300 kwrite/erase cycles and a high system integration level with internal clock oscillators, watchdog and brown-out reset.

Device performance is ensured by a 16 MHz CPU clock frequency and enhanced characteristics which include robust I/O, independent watchdogs (with a separate clock source), and a clock security system.

Short development cycles are guaranteed due to application scalability across a common family product architecture with compatible pinout, memory map and and modular peripherals. Full documentation is offered with a wide choice of development tools

Product longevity is ensured in the STM8S family thanks to their advanced core which is made in a state-of-the art technology for applications with 2.95 V to 5.5 V operating supply.

DATASHEET






Key Features

• Core
  • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline
  • Extended instruction set
• Memories
  • Medium-density Flash/EEPROM:
    • Program memory up to 32 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
    • Data memory up to 1Kbytes true data EEPROM; endurance 300 kcycles
  • RAM: Up to 2 Kbytes
• Clock, reset and supply management
  • 2.95 to 5.5 V operating voltage
  • Flexible clock control, 4 master clock sources:
    • Low power crystal resonator oscillator
    • External clock input
    • Internal,user-trimmable 16 MHz RC
    • Internal low power 128 kHz RC
  • Clock security system with clock monitor
  • Power management:
    • Low power modes (wait, active-halt, halt)
    • Switch-off peripheral clocks individually
  • Permanently active,low consumption power-on and power-down reset
• Interrupt management
  • Nested interrupt controller with 32 interrupts
  • Up to 37 external interrupts on 6 vectors
• Timers
  • 2x16-bit general purpose timer, with 2+3 CAPCOM channels (IC, OC or PWM)
  • Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
  • 8-bit basic timer with 8-bit prescaler
  • Auto wakeup timer
  • Window watchdog, independent watchdog timers
• Communications interfaces
  • UART with clock output for synchronous operation, Smartcard, IrDA, LIN master mode
  • SPI interface up to 8 Mbit/s
  • I²C interface up to 400 Kbit/s
• Analog to digital converter (ADC)
  • 10-bit, ±1 LSB ADC with up to 10 multiplexed channels, scan mode and analog watchdog
• I/Os
  • Up to 38 I/Os on a 48-pin package including 16 high sink outputs
  • Highly robust I/O design, immune against current injection
• Development support
  • Embedded single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging
• Unique ID
  • 96-bit unique ID key for each device

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