參數(shù)資料
型號: COP8SGR9DWF3
廠商: National Semiconductor Corporation
英文描述: 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
中文描述: 8位的CMOS基于ROM和OTP微控制器具有8K到32K的內(nèi)存,2個比較器和USART
文件頁數(shù): 7/62頁
文件大?。?/td> 913K
代理商: COP8SGR9DWF3
4.0 Pin Descriptions (Continued)
Note: For compatibility with existing software written for COP888xG devices
and with existing Mask ROM devices, a read of the Port I input pins
(address xxD7) will return the same data as reading the Port F input
pins (address xx96). It is recommended new applications which will go
to production with the COP8SGx use the Port F addresses. Note that
compatible ROM devices contains the input only Port I instead of the
bi-directional Port F.
Port D is an 8-bit output port that is preset high when RESET
goes low. The user can tie two or more D port outputs
(except D2) together in order to get a higher drive.
Note: Care must be exercised with the D2 pin operation. At RESET, the
external loads on this pin must ensure that the output voltages stay
above 0.7 VCC to prevent the chip from entering special modes. Also
keep the external loading on D2 to less than 1000 pF.
10131710
FIGURE 4. I/O Port Configurations
10131712
FIGURE 5. I/O Port Configurations — Output Mode
10131711
FIGURE 6. I/O Port Configurations — Input Mode
COP8SG
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COP8SGR9DWF8 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
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