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7
Step 1:
Place the completed circuit with a tantalum capaci-
tor of the recommended value in an environmental cham-
ber at the lowest specified operating temperature and
monitor the outputs on the oscilloscope. A decade box
connected in series with the capacitor C
2
will simulate the
higher ESR of an aluminum capacitor. (Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible)
Step 2:
With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscil-
lations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3:
Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4:
Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage condi-
tions.
Step 5:
If the capacitor C
2
is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. (A smaller capaci-
tor will usually cost less and occupy less board space.) If
the capacitor oscillates within the range of expected oper-
ating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6:
Test the load transient response by switching in
various loads at several frequencies to simulate its real
work environment. Vary the ESR to reduce ringing.
Step 7:
Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regula-
tor performance. Most good quality aluminum electrolytic
capacitors have a tolerance of +/-20% so the minimum
value found should be increased by at least 50% to allow
for this tolerance plus the variation which will occur at
low temperatures. The ESR of the capacitor should be less
than 50% of the maximum allowable ESR found in step 3
above. Once the value for C2 is determined, repeat the
steps to determine the appropriate value for C3.
The maximum power dissipation for a dual output regula-
tor (Figure 1) is
P
D(max)
= {V
IN(max)
DV
OUT1(min)
}I
OUT1(max)
+
{V
IN(max)
DV
OUT2(min)
}I
OUT2(max)
+V
IN(max)
IQ (1)
Where
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,
I
OUT1(max)
is the maximum output current, for the appli-
cation
I
OUT2(max)
is the maximum output current, for the appli-
cation
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum permis-
sible value of R
Q
JA
can be calculated:
R
Q
JA
=
(2)
The value of R
Q
JA
can then be compared with those in
the package section of the data sheet. Those packages
with R
Q
JA
's less than the calculated value in equation 2
will keep the die temperature below 150C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of R
Q
JA
.
R
Q
JA
= R
Q
JC
+ R
Q
CS
+ R
Q
SA
where
R
Q
JC
= the junctionDtoDcase thermal resistance,
R
Q
CS
= the caseDtoDheatsink thermal resistance, and
R
Q
SA
= the heatsinkDtoDambient thermal resistance.
R
Q
JC
appears in the package section of the data sheet. Like
R
Q
JA
, it too is a function of package type. R
Q
CS
and R
Q
SA
are functions of the package type, heatsink and the inter-
face between them. These values appear in heat sink data
sheets of heat sink manufacturers.
(3)
150C - T
A
P
D
C
Application Notes: continued
Calculating Power Dissipation
in a Dual Output Linear Regulator
V
IN
Smart
Regulator
V
OUT1
I
OUT1
I
IN
I
Q
Control
Features
}
V
OUT2
I
OUT2
Figure 1: Dual output regulator with key performance parameters
labeled.
Heat Sinks