參數(shù)資料
型號(hào): CY2308SXI-4
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 時(shí)鐘及定時(shí)
英文描述: 3.3V Zero Delay Buffer
中文描述: 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封裝: 0.150 INCH, LEAD FREE, MS-012, SOIC-16
文件頁數(shù): 8/14頁
文件大?。?/td> 203K
代理商: CY2308SXI-4
CY2308
Document #: 38-07146 Rev. *C
Page 3 of 14
Zero Delay and Skew Control
To close the feedback loop of the CY2308, the FBK pin can be
driven from any of the eight available output pins. The output
driving the FBK pin will be driving a total load of 7 pF plus any
additional load that it drives. The relative loading of this output
(with respect to the remaining outputs) can adjust the input-
output delay. This is shown in the graph above.
For applications requiring zero input-output delay, all outputs
including the one providing feedback should be equally
loaded. If input-output delay adjustments are required, use the
above graph to calculate loading differences between the
feedback output and remaining outputs.
For zero output-output skew, be sure to load outputs equally.
For further information on using CY2308, refer to the appli-
cation note “CY2308: Zero Delay Buffer.”
Maximum Ratings
Supply Voltage to Ground Potential ...............–0.5V to +7.0V
DC Input Voltage (Except Ref) .............. –0.5V to VDD + 0.5V
DC Input Voltage REF ........................................... –0.5 to 7V
Storage Temperature.................................. –65°C to +150°C
Junction Temperature...................................................150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ............................. >2000V
REF. Input to CLKA/CLKB Delay v/s Difference in Loading between FBK pin and CLKA/CLKB Pins
Operating Conditions for CY2308SC-XX Commercial Temperature Devices
Parameter
Description
Min.
Max.
Unit
VDD
Supply Voltage
3.0
3.6
V
TA
Operating Temperature (Ambient Temperature)
0
70
°C
CL
Load Capacitance, below 100 MHz
30
pF
Load Capacitance, from 100 MHz to 133 MHz
15
pF
CIN
Input Capacitance[6]
7pF
tPU
Power-up time for all VDDs to reach minimum specified voltage
(power ramps must be monotonic)
0.05
50
ms
Note:
6. Applies to both Ref Clock and FBK.
相關(guān)PDF資料
PDF描述
CY2308SXI-5H 3.3V Zero Delay Buffer
CY7C106B-20VI 256K x 4 Static RAM
CY7C106B-25VC 256K x 4 Static RAM
CY7C106B-25VI 256K x 4 Static RAM
CY7C106B-35VC TV 7C 7#20 PIN RECP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY2308SXI-4T 功能描述:時(shí)鐘緩沖器 3.3VZDB IND RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
CY2308SXI-5H 功能描述:時(shí)鐘緩沖器 3.3V ZDB w/ Internal Feedback RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
CY2308SXI-5HT 功能描述:時(shí)鐘緩沖器 3.3V ZDB w/ Internal Feedback RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
CY2308SZC-1 制造商:Cypress Semiconductor 功能描述:
CY2308SZC-1T 制造商:Rochester Electronics LLC 功能描述:- Bulk