參數(shù)資料
型號(hào): XC17S50APDG8C
廠商: Xilinx Inc
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 0K
描述: IC PROM SER 50K C-TEMP 8-DIP
標(biāo)準(zhǔn)包裝: 50
可編程類型: OTP
存儲(chǔ)容量: 500kb
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
Spartan-II/Spartan-IIE Family OTP Configuration PROMs (XC17S00A)
DS078 (v1.10) June 25, 2007
Product Specification
4
R
Standby Mode
The PROM enters a low-power standby mode whenever CE
is asserted High. The output remains in a high-impedance
state regardless of the state of the OE input.
Programming Spartan-II/Spartan-IIE
Family PROMs
The devices can be programmed on programmers supplied
by Xilinx or qualified third-party vendors. The user must
ensure that the appropriate programming algorithm and the
latest version of the programmer software are used. The
wrong choice can permanently damage the device.
Caution! Always tie the two VCC pins together.
Figure 2: Simplified Block Diagram (does not show programming circuit)
Table 1: Truth Table for XC17S00A Control Inputs
Control Inputs
Internal Address(2)
Outputs
RESET(1)
CE
DATA
ICC
Inactive
Low
If address < TC: increment
If address > TC: don’t change
Active
High-Z
Active
Reduced
Active
Low
Held reset
High-Z
Active
Inactive
High
Not changing
High-Z
Standby
Active
High
Held reset
High-Z
Standby
Notes:
1.
The XC17S00A RESET input has programmable polarity
2.
TC = Terminal Count = highest address value. TC + 1 = address 0.
EPROM
Cell
Matrix
Address Counter
CE
DATA
OE
Output
CLK
VCC
GND
DS030_02_011300
TC
OE
RESET/
OE/
RESET
or
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