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參數(shù)資料
| 型號(hào)： | CY7C1069AV33-8BAC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2M x 8 Static RAM |
| 中文描述： | 2M X 8 STANDARD SRAM, 8 ns, PBGA48 |
| 封裝： | 8 X 20 MM, 1.20 MM HEIGHT, FBGA-48 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 249K |
| 代理商： | CY7C1069AV33-8BAC |
2M x 8 Static RAM
CY7C1069AV33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
, CA 95134
408-943-2600
Document #: 38-05255 Rev. *D
Revised February 10, 2003
Features
High speed
—tAA = 8, 10, 12 ns
Low active power
— 1080 mW (max.)
Operating voltages of 3.3 ± 0.3V
2.0V data retention
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE1 and CE2 features
Functional Description
The CY7C1069AV33 is a high-performance CMOS Static
RAM organized as 2,097,152 words by 8 bits. Writing to the
device is accomplished by enabling the chip (by taking CE1
LOW and CE2 HIGH) and Write Enable (WE) inputs LOW.
Reading from the device is accomplished by enabling the chip
(CE1 LOW and CE2 HIGH) as well as forcing the Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
See the truth table at the back of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a Write operation (CE1 LOW, CE2 HIGH, and WE
LOW).
The CY7C1069AV33 is available in a 54-pin TSOP II package
with center power and ground (revolutionary) pinout, and a
48-ball fine-pitch ball grid array (FBGA) package.
Selection Guide
–8
–10
–12
Unit
Maximum Access Time
810
12
ns
Maximum Operating Current
Commercial
300
275
260
mA
Industrial
300
275
260
Maximum CMOS Standby Current
Commercial/Industrial
50
mA
15
16
Logic Block Diagram
Pin Configuration
A1
A2
A3
A4
A5
A6
A7
A8
COLUMN
DECODER
ROW
DEC
O
DE
R
SE
NSE
AM
PS
INPUT BUFFER
2M x 8
ARRAY
A0
A
12
A
14
A
13
A
17
A
18
A
10
A
11
4096 x 4096
I/O0–I/O7
OE
CE2
WE
CE1
Top View
TSOP II
WE
1
2
3
4
5
6
7
8
9
10
11
14
31
32
36
35
34
33
37
40
39
38
12
13
41
43
42
16
15
29
30
A5
A6
A7
A8
A0
A1
OE
VSS
A17
I/O7
A2
CE1
I/O0
I/O1
A3
A4
18
17
20
19
27
28
25
26
22
21
23
24
I/O2
I/O3
A16
A15
VCC
I/O6
NC
I/O5
I/O4
A14
A13
A12
A11
A9
A10
CE2
44
46
45
47
50
49
48
51
53
52
54
VSS
VCC
A19
A18
VCC
VCC
VSS
DNU
VSS
NC
VCC
VSS
A9
A
19
A
20
NC
A20
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1069AV33-8ZXC | 功能描述:IC SRAM 16MBIT 8NS 54TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C1069AV33-8ZXCT | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 3.3V 16MBIT 2MX8 8NS 54TSOP-II - Tape and Reel |
| CY7C1069BV33-10ZXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1069BV33-10ZXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1069BV33-12ZC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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