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參數(shù)資料
| 型號(hào)： | CY7C1069AV33-8ZI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2M x 8 Static RAM |
| 中文描述： | 2M X 8 STANDARD SRAM, 8 ns, PDSO54 |
| 封裝： | TSOP2-54 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 249K |
| 代理商： | CY7C1069AV33-8ZI |
CY7C1069AV33
Document #: 38-05255 Rev. *D
Page 6 of 9
Switching Waveforms (continued)
Write Cycle No. 1 (CE1 Controlled)
tHD
tSD
tSCE
tSA
tHA
tAW
tPWE
tWC
BW
DATAI/O
ADDRESS
CE
WE
[13, 14, 15]
t
Write Cycle No. 2 (WE Controlled, OE LOW)
tHD
tSD
tSCE
tHA
tAW
tPWE
tWC
DATA I/O
ADDRESS
CE
WE
tSA
tLZWE
tHZWE
[13, 14, 15]
Truth Table
CE1
CE2
OE
WE
I/O0–I/O7
Mode
Power
H
X
High-Z
Power-down
Standby (ISB)
X
L
X
High-Z
Power-down
Standby (ISB)
L
H
L
H
Data Out
Read All Bits
Active (ICC)
L
H
X
L
Data In
Write All Bits
Active (ICC)
L
H
High-Z
Selected, Outputs Disabled
Active (ICC)
Notes:
12. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH.
13. Data I/O is high-impedance if OE = VIH.
14. If CE1 goes HIGH / CE2 LOW simultaneously with WE going HIGH, the output remains in a high–impedance state.
15. CE above is defined as a combination of CE1 and CE2. It is active low.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1069AV33-8ZXC | 功能描述:IC SRAM 16MBIT 8NS 54TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C1069AV33-8ZXCT | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 3.3V 16MBIT 2MX8 8NS 54TSOP-II - Tape and Reel |
| CY7C1069BV33-10ZXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1069BV33-10ZXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1069BV33-12ZC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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