參數(shù)資料
型號: CY7C1335
廠商: Cypress Semiconductor Corp.
英文描述: 32K x 32 Synchronous-Pipelined Cache RAM(32K x 32 同步流水線式高速緩沖存儲器 RAM)
中文描述: 32K的× 32同步流水線緩存內(nèi)存(32K的× 32同步流水線式高速緩沖存儲器的RAM)
文件頁數(shù): 12/15頁
文件大?。?/td> 278K
代理商: CY7C1335
CY7C1335
12
Read/Write Cycle Timing
[14, 15, 16, 17]
Notes:
17. Data bus is driven by SRAM, but data is not guaranteed.
18. Device originally deselected.
19. CE is the combination of CE
2
and CE
3
. All chip selects need to be active in order to select the device.
Switching Waveforms
(continued)
ADSP
CLK
ADSC
ADV
ADD
CE
1
OE
GW
WE
CE
2
CE
3
1a
1a
Out
Data In/Out
t
CYC
t
CH
t
CL
t
ADS
t
ADH
t
ADS
t
ADH
t
ADVS
t
ADVH
RD1
WD2
RD3
t
AH
t
AS
t
WS
t
WH
t
WH
t
WS
t
CES
t
CEH
t
CES
t
CEH
t
CES
t
CEH
t
OELZ
t
CO
t
DOE
3a
Out
3c
Out
3d
Out
t
OEHZ
t
DOH
t
CHZ
Single Read
Burst Read
Unselected
ADSP ignored with CE
1
inactive
CE
1
masks ADSP
= DON
T CARE
= UNDEFINED
Pipelined Read
2a
In
3b
Out
Single Write
t
DS
t
DH
See Note 17
相關PDF資料
PDF描述
CY7C1336 64K x 32 Synchronous Flow-Through 3.3V Cache RAM(3.3V 64K x 32 同步流通式高速緩沖RAM)
CY7C1337 32K x 32 Synchronous-Pipelined Cache RAM(32K x 32 同步流水線式高速緩沖存儲器 RAM)
CY7C1338G-117AXI 4-Mbit (128K x 32) Flow-Through Sync SRAM
CY7C1338G-133BGXI 4-Mbit (128K x 32) Flow-Through Sync SRAM
CY7C1338G-100AXC 4-Mbit (128K x 32) Flow-Through Sync SRAM
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