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參數(shù)資料
| 型號： | CY7C1357C-133BGI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
| 中文描述： | 512K X 18 ZBT SRAM, 6.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, BGA-119 |
| 文件頁數(shù)： | 28/28頁 |
| 文件大?。?/td> | 456K |
| 代理商： | CY7C1357C-133BGI |
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CY7C1355C
CY7C1357C
Document #: 38-05539 Rev. *E
Page 28 of 28
Document History Page
Document Title: CY7C1355C/CY7C1357C 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
Document Number: 38-05539
Orig. of
Change
**
242032
See ECN
RKF
New data sheet
*A
332059
See ECN
PCI
Changed Boundary Scan Order to match the B rev of these devices
Removed description on Extest Output Bus Tri-state
Removed 117 MHz Speed Bin
Changed I
DDZZ
from 35 mA to 50 mA on Pg # 9
Changed I
SB1
and I
SB3
from 40 mA to 110 and 100 mA respectively
Address expansion pins/balls in the pinouts for all packages are modified as
per JEDEC standard
Modified V
OL,
V
OH
test conditions
Corrected I
SB4
Test Condition from (V
IN
≥
V
DD
– 0.3V or V
IN
≤
0.3V) to (V
IN
≥
V
IH
or V
IN
≤
V
IL
) in the Electrical Characteristic Table on Pg #18
Changed
Θ
JA
and
Θ
Jc
for TQFP Package from 25 and 9 °C/W to 29.41 and
6.13 °C/W
respectively
Changed
Θ
JA
and
Θ
Jc
for BGA Package from 25 and 6 °C/W to 34.1 and 14.0
°C/W
respectively
Changed
Θ
JA
and
Θ
Jc
for FBGA Package from 27 and 6 °C/W to 16.8 and 3.0
°
C/W respectively
Added lead-free information for 100-pin TQFP, 119 BGA and 165 FBGA
Packages
Updated Ordering Information Table
Changed from Preliminary to Final
*B
351895
See ECN
PCI
Changed I
SB2
from 30 to 40 mA
Updated Ordering Information Table
*C
377095
See ECN
PCI
Modified test condition in note# 14 from V
IH
< V
DD
to
V
IH
<
V
DD
*D
408298
See ECN
RXU
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Modified “Input Load” to “Input Leakage Current except ZZ and MODE” in the
Electrical Characteristics Table
Changed three-state to tri-state
Replaced Package Name column with Package Diagram in the Ordering
Information table
Updated Ordering Information Table
*E
501793
See ECN
VKN
Added the Maximum Rating for Supply Voltage on V
DDQ
Relative to GND
Changed t
TH
, t
TL
from 25 ns to 20 ns and t
TDOV
from 5 ns to 10 ns in TAP AC
Switching Characteristics table.
Updated the Ordering Information table.
REV.
ECN NO.
Issue Date
Description of Change
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1357C-133BGXC | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1357C-133BGXI | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1357C-133BZC | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1357C-133BZI | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1357C-133BZXC | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL⑩ Architecture |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1357S-100AXC | 功能描述:靜態(tài)隨機存取存儲器 CY7C1357S-100AXC RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1357S-100AXCT | 功能描述:靜態(tài)隨機存取存儲器 CY7C1357S-100AXCT RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1359A-100AC | 制造商:Cypress Semiconductor 功能描述: 制造商:Cypress Semiconductor 功能描述:256K X 18 CACHE TAG SRAM, 4 ns, PQFP100 |
| CY7C1359A-100ACT | 制造商:Cypress Semiconductor 功能描述: 制造商:Cypress Semiconductor 功能描述:Electronic Component |
| CY7C1359A-150AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4M-Bit 256K x 16 3.8ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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