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參數(shù)資料
| 型號(hào)： | CY7C1381FV25-100BGI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| 中文描述： | 512K X 36 CACHE SRAM, 8.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, BGA-119 |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 952K |
| 代理商： | CY7C1381FV25-100BGI |
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CY7C1381DV25, CY7C1381FV25
CY7C1383DV25, CY7C1383FV25
Document #: 38-05547 Rev. *E
Page 15 of 28
Identification Codes
Instruction
EXTEST
Code
000
Description
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use. This instruction is reserved for future use.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
Do Not Use. This instruction is reserved for future use.
Do Not Use. This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
IDCODE
001
SAMPLE Z
010
RESERVED
SAMPLE/PRELOAD
011
100
RESERVED
RESERVED
BYPASS
101
110
111
119-Ball BGA Boundary Scan Order
[13, 14]
Bit #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Ball ID
Bit #
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Ball ID
F6
E7
D7
H7
G6
E6
D6
C7
B7
C6
A6
C5
B5
G5
B6
D4
B4
F4
M4
A5
K4
E4
Bit #
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Ball ID
G4
A4
G3
C3
B2
B3
A3
C2
A2
B1
C1
D2
E1
F2
G1
H2
D1
E2
G2
H1
J3
2K
Bit #
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
Ball ID
L1
M2
N1
P1
K1
L2
H4
T4
T5
T6
R5
L5
R6
U6
R7
T7
P6
N7
M6
L7
K6
P7
N6
L6
K7
J5
H6
G7
N2
P2
R3
T1
R1
T2
L3
R2
T3
L4
N4
P4
Internal
Notes
13.Balls that are NC (No Connect) are preset LOW.
14.Bit #85 is preset HIGH.
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1381FV25-100BGXC | Replacement for Intersil part number 131684. Buy from authorized manufacturer Rochester Electronics. |
| CY7C1381FV25-100BGXI | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| CY7C1381FV25-133BGC | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| CY7C1381FV25-133BGI | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| CY7C1381FV25-133BGXC | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| CY7C1381S-133AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 CY7C1381S-133AXC RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1381XC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1382 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C138-25JC | 功能描述:IC SRAM 32KBIT 25NS 68PLCC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| CY7C138-25JXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 5V 4Kx8 COM CMOS Dual Port 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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