參數(shù)資料
型號： CY7C1472V25-167BZXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL⑩ Architecture
中文描述： 4M X 18 ZBT SRAM, 3.4 ns, PBGA165
封裝： 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, FBGA-165
文件頁數(shù)： 9/28頁
文件大小： 378K
代理商： CY7C1472V25-167BZXC
PRELIMINARY
CY7C1470V33
CY7C1472V33
CY7C1474V33
Document #: 38-05289 Rev. *E
Page 9 of 28
Notes:
1. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for ALL Chip Enables active. BWx = 0 signifies at least one Byte Write Select is active, BWx = Valid
signifies that the desired byte write selects are asserted, see Write Cycle Description table for details.
2. Write is defined by WE and BW
. See Write Cycle Description table for details.
3. When a Write cycle is detected, all I/Os are tri-stated, even during Byte Writes.
4. The DQ and DQP pins are controlled by the current cycle and the OE signal.
5. CEN = H inserts wait states.
6. Device will power-up deselected and the I/Os in a tri-state condition, regardless of OE.
7. OE is asynchronous and is not sampled with the clock rise. It is masked internally during Write cycles. During a Read cycle DQ
s
and DQP
[a:d]
= Tri-state when
OE is inactive or when the device is deselected, and DQ
s
= data when OE is active.
Truth Table
[1, 2, 3, 4, 5, 6, 7]
Operation
Address
Used
None
None
CE
H
X
ZZ
L
L
ADV/LD
L
H
WE
X
X
BW
x
X
X
OE
X
X
CEN
CLK
L-H
L-H
DQ
Deselect Cycle
Continue
Deselect Cycle
Read Cycle
(Begin Burst)
Read Cycle
(Continue Burst)
NOP/Dummy Read
(Begin Burst)
Dummy Read
(Continue Burst)
Write Cycle
(Begin Burst)
Write Cycle
(Continue Burst)
NOP/Write Abort
(Begin Burst)
Write Abort
(Continue Burst)
Ignore Clock Edge
(Stall)
Sleep Mode
L
L
Tri-State
Tri-State
External
L
L
L
H
X
L
L
L-H
Data Out (Q)
Next
X
L
H
X
X
L
L
L-H
Data Out (Q)
External
L
L
L
H
X
H
L
L-H
Tri-State
Next
X
L
H
X
X
H
L
L-H
Tri-State
External
L
L
L
L
L
X
L
L-H
Data In (D)
Next
X
L
H
X
L
X
L
L-H
Data In (D)
None
L
L
L
L
H
X
L
L-H
Tri-State
Next
X
L
H
X
H
X
L
L-H
Tri-State
Current
X
L
X
X
X
X
H
L-H
-
None
X
H
X
X
X
X
X
X
Tri-State
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相關代理商/技術參數(shù)
參數(shù)描述
CY7C1472V25-200AXC 功能描述:靜態(tài)隨機存取存儲器 72MB (4Mx18) 2.5v 200MHz 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1472V25-200AXCT 功能描述:靜態(tài)隨機存取存儲器 4Mx18 2.5V NoBL PL 靜態(tài)隨機存取存儲器 COM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1472V25-200BZC 制造商:Cypress Semiconductor 功能描述:
CY7C1472V25-200BZCT 功能描述:靜態(tài)隨機存取存儲器 4Mx18 2.5V NoBL PL 靜態(tài)隨機存取存儲器 COM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1472V25-200BZIT 功能描述:靜態(tài)隨機存取存儲器 4Mx18 2.5V NoBL PL 靜態(tài)隨機存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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