- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379080 > CY7C1483V33-100BZXC (CYPRESS SEMICONDUCTOR CORP) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM PDF資料下載
參數(shù)資料
| 型號： | CY7C1483V33-100BZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| 中文描述： | 4M X 18 CACHE SRAM, 8.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, FBGA-165 |
| 文件頁數(shù)： | 1/30頁 |
| 文件大?。?/td> | 998K |
| 代理商： | CY7C1483V33-100BZXC |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
72-Mbit (2M x 36/4M x 18/1M x 72)
Flow-Through SRAM
CY7C1481V33
CY7C1483V33
CY7C1487V33
Cypress Semiconductor Corporation
Document #: 38-05284 Rev. *H
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised May 01, 2007
Features
Supports 133 MHz bus operations
2M x 36/4M x 18/1M x 72 common IO
3.3V core power supply (V
DD
)
2.5V or 3.3V I/O supply (V
DDQ
)
Fast clock-to-output times
— 6.5 ns (133 MHz version)
Provide high-performance 2-1-1-1 access rate
User selectable burst counter supporting Intel
Pentium
interleaved or linear burst sequences
Separate processor and controller address strobes
Synchronous self timed write
Asynchronous output enable
CY7C1481V33, CY7C1483V33 available in
JEDEC-standard Pb-free 100-pin TQFP, Pb-free and
non-Pb-free 165-ball FBGA package. CY7C1487V33
available in Pb-free and non-Pb-free 209 ball FBGA
package
IEEE 1149.1 JTAG-Compatible Boundary Scan
“ZZ” Sleep Mode option
Functional Description
[1]
The CY7C1481V33/CY7C1483V33/CY7C1487V33 is a 3.3V,
2M x 36/4M x 18/1M x 72 Synchronous Flow-through SRAM
designed to interface with high speed microprocessors with
minimum glue logic. Maximum access delay from clock rise is
6.5 ns (133 MHz version). A two-bit on-chip counter captures
the first address in a burst and increments the address
automatically for the rest of the burst access. All synchronous
inputs
are
gated
by
registers
positive-edge-triggered Clock Input (CLK). The synchronous
inputs include all addresses, all data inputs, address-pipelining
Chip Enable (CE
1
), depth-expansion Chip Enables (CE
2
and
CE
3
), Burst Control inputs (ADSC, ADSP, and ADV), Write
Enables (BW
x
and BWE), and Global Write (GW).
Asynchronous inputs include the Output Enable (OE) and the
ZZ pin.
controlled
by
a
The CY7C1481V33/CY7C1483V33/CY7C1487V33 allows
either interleaved or linear burst sequences, selected by the
MODE input pin. A HIGH selects an interleaved burst
sequence, while a LOW selects a linear burst sequence. Burst
accesses can be initiated with the Processor Address Strobe
(ADSP) or the cache Controller Address Strobe (ADSC)
inputs. Address advancement is controlled by the Address
Advancement (ADV) input.
Addresses and chip enables are registered at rising edge of
clock when either Address Strobe Processor (ADSP) or
Address Strobe Controller (ADSC) are active. Subsequent
burst addresses can be internally generated as controlled by
the Advance pin (ADV).
The CY7C1481V33/CY7C1483V33/CY7C1487V33 operates
from a +3.3V core power supply while all outputs may operate
with either a +2.5 or +3.3V supply. All inputs and outputs are
JEDEC standard JESD8-5 compatible.
Selection Guide
133 MHz
6.5
335
150
100 MHz
8.5
305
150
Unit
ns
mA
mA
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Note
1. For best practices recommendations, refer to the Cypress application note
AN1064, SRAM System Guidelines
.
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1483V33-100BZXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1483V33-133AXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1483V33-133AXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1483V33-133BZI | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1483V33-133BZXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C148-45DC | 制造商:Cypress Semiconductor 功能描述:Static RAM, 1Kx4, 18 Pin, Ceramic, DIP |
| CY7C148-45PC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1484BV25-250AXI | 制造商:Cypress Semiconductor 功能描述:SYNC - Trays 制造商:Cypress Semiconductor 功能描述:IC SRAM 72MBIT 250MHZ 100TQFP 制造商:Cypress Semiconductor 功能描述:TRAY / Sync SRAMs |
| CY7C1484BV33-250BZI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1484BV33-250BZXC | 功能描述:靜態(tài)隨機(jī)存取存儲器 72MB (2Mx36) 3.3v 250MHz 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。