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參數(shù)資料
| 型號： | CY7C1484V33-167BZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
| 中文描述： | 2M X 36 CACHE SRAM, 3.4 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, FBGA-165 |
| 文件頁數(shù)： | 14/26頁 |
| 文件大?。?/td> | 909K |
| 代理商： | CY7C1484V33-167BZXC |
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CY7C1484V33
CY7C1485V33
Document #: 38-05285 Rev. *G
Page 14 of 26
Scan Register Sizes
Register Name
Bit Size (x36)
3
1
32
73
Bit Size (x18)
3
1
32
54
Instruction
Bypass
ID
Boundary Scan Order – 165BGA
Identification Codes
Instruction
EXTEST
IDCODE
Code
000
001
Description
Captures IO ring contents.
Loads the ID register with the vendor ID code and places the register between TDI and TDO. This
operation does not affect SRAM operations.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM operations.
SAMPLE Z
010
RESERVED
SAMPLE/PRE
LOAD
RESERVED
RESERVED
BYPASS
011
100
101
110
111
Boundary Scan Exit Order (2M x 36)
Bit #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
165-Ball ID
C1
D1
E1
D2
E2
F1
G1
F2
G2
J1
K1
L1
J2
M1
N1
K2
L2
M2
R1
R2
Bit #
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
165-Ball ID
R3
P2
R4
P6
R6
N6
P11
R8
P3
P4
P8
P9
P10
R9
R10
R11
N11
M11
L11
M10
Bit #
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
165-Ball ID
L10
K11
J11
K10
J10
H11
G11
F11
E11
D10
D11
C11
G10
F10
E10
A10
B10
A9
B9
A8
Bit #
61
62
63
64
65
66
67
68
69
70
71
72
73
165-Ball ID
B8
A7
B7
B6
A6
B5
A5
A4
B4
B3
A3
A2
B2
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1484V33-167BZXI | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
| CY7C1484V33-200AXC | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
| CY7C1484V33-200AXI | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
| CY7C1484V33-200BZI | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
| CY7C1484V33-200BZXC | 72-Mbit (2M x 36/4M x 18) Pipelined DCD Sync SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C149 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C149-45PC | 功能描述:1KX4 18-PIN SRAM RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR) |
| CY7C150-10DC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C150-15PC | 制造商:Rochester Electronics LLC 功能描述:4K (1K X 4)- 24 PIN 300 MIL SEPARATE I/O & RESET SRAM - Bulk |
| CY7C15025PC | 制造商:CYPRESS 功能描述:* |
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