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參數(shù)資料
| 型號： | CY7C1514AV18-200BZI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
| 中文描述： | 2M X 36 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, MO-216, FBGA-165 |
| 文件頁數(shù)： | 17/26頁 |
| 文件大小： | 1074K |
| 代理商： | CY7C1514AV18-200BZI |
PRELIMINARY
CY7C1510AV18
CY7C1525AV18
CY7C1512AV18
CY7C1514AV18
Document #: 001-06984 Rev. *B
Page 17 of 26
Identification Register Definitions
Instruction Field
Revision Number
(31:29)
Cypress Device ID
(28:12)
Cypress JEDEC ID
(11:1)
Value
Description
Version
number.
CY7C1510AV18
001
CY7C1525AV18
001
CY7C1512AV18
001
CY7C1514AV18
001
11010011010000100 11010011010001100 11010011010010100 11010011010100100 Defines the
type of SRAM.
Unique identifi-
cation of SRAM
vendor.
Indicates the
presence of an
ID register.
00000110100
00000110100
00000110100
00000110100
ID Register Presence
(0)
1
1
1
1
Scan Register Sizes
Register Name
Instruction
Bypass
ID
Boundary Scan Cells
Bit Size
3
1
32
109
Instruction Codes
Instruction
Code
000
001
Description
EXTEST
IDCODE
Captures the Input/Output ring contents.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between TDI and
TDO. Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register between TDI
and TDO. Does not affect the SRAM operation.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operation.
SAMPLE Z
010
RESERVED
SAMPLE/PRELOAD
011
100
RESERVED
RESERVED
BYPASS
101
110
111
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1514AV18-200BZXC | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
| CY7C1514AV18-200BZXI | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
| CY7C1514AV18-250BZC | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
| CY7C1514AV18-250BZI | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
| CY7C1514AV18-250BZXC | 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1514AV18-200BZXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1514AV18-200BZXI | 功能描述:靜態(tài)隨機存取存儲器 2M x 36 1.8V QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1514AV18-250BZC | 功能描述:靜態(tài)隨機存取存儲器 2M x 36 1.8V QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1514AV18-250BZI | 功能描述:靜態(tài)隨機存取存儲器 2M x 36 1.8V QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1514AV18-250BZXC | 制造商:Cypress Semiconductor 功能描述: |
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