參數(shù)資料
型號(hào)： CY7C1525AV18
廠商： Cypress Semiconductor Corp.
英文描述： 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
中文描述： 72兆位QDR - II型⑩SRAM的2字突發(fā)結(jié)構(gòu)
文件頁(yè)數(shù)： 17/26頁(yè)
文件大?。?/td> 1074K
代理商： CY7C1525AV18
PRELIMINARY
CY7C1510AV18
CY7C1525AV18
CY7C1512AV18
CY7C1514AV18
Document #: 001-06984 Rev. *B
Page 17 of 26
Identification Register Definitions
Instruction Field
Revision Number
(31:29)
Cypress Device ID
(28:12)
Cypress JEDEC ID
(11:1)
Value
Description
Version
number.
CY7C1510AV18
001
CY7C1525AV18
001
CY7C1512AV18
001
CY7C1514AV18
001
11010011010000100 11010011010001100 11010011010010100 11010011010100100 Defines the
type of SRAM.
Unique identifi-
cation of SRAM
vendor.
Indicates the
presence of an
ID register.
00000110100
00000110100
00000110100
00000110100
ID Register Presence
(0)
1
1
1
1
Scan Register Sizes
Register Name
Instruction
Bypass
ID
Boundary Scan Cells
Bit Size
3
1
32
109
Instruction Codes
Instruction
Code
000
001
Description
EXTEST
IDCODE
Captures the Input/Output ring contents.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between TDI and
TDO. Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register between TDI
and TDO. Does not affect the SRAM operation.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operation.
SAMPLE Z
010
RESERVED
SAMPLE/PRELOAD
011
100
RESERVED
RESERVED
BYPASS
101
110
111
[+] Feedback
相關(guān)PDF資料
PDF描述
CY7C1525AV18-167BZC 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
CY7C1525AV18-167BZI 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
CY7C1525AV18-167BZXC 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
CY7C1525AV18-167BZXI 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
CY7C1510AV18-167BZC 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1525JV18250BZC 制造商:Cypress Semiconductor 功能描述:
CY7C1525JV18-250BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M x 9 1.8V QDR-II 靜態(tài)隨機(jī)存取存儲(chǔ)器 Two-Word Burst RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1525JV18-250BZCES 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C1525JV18-250BZXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M x 9 1.8V QDR-II 靜態(tài)隨機(jī)存取存儲(chǔ)器 Two-Word Burst RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1525KV18-250BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 72MB (8Mx9) 1.8v 250MHz QDR II 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*