參數(shù)資料
型號: CY7C43633
廠商: Cypress Semiconductor Corp.
英文描述: 512 x36 Unidirectional Synchronous FIFO w/ Bus Matching(512 x36 單向同步先進先出帶總線匹配)
中文描述: 512 x36單向同步FIFO瓦特/總線匹配(512 x36單向同步先進先出帶總線匹配)
文件頁數(shù): 14/28頁
文件大小: 422K
代理商: CY7C43633
CY7C43623
CY7C43633/CY7C43643
CY7C43663
/
CY7C43683
14
PRELIMINARY
Notes:
22. t
is the minimum time between a rising CLKA edge and a rising CLKB edge for EF to transition HIGH in the next CLKB cycle. If the time between the
rising CLKA edge and rising CLKB edge is less than t
SKEW1
, then the transition of EF HIGH may occur one CLKB cycle later than shown.
Switching Waveforms
(continued)
t
CLKH
t
CLKL
t
ENS
t
ENH
t
ENS
t
ENH
t
A
t
DS
W1
LOW
t
DH
HIGH
HIGH
FIFO Empty
LOW
HIGH
LOW
W1
t
ENS
t
ENH
t
REF
t
REF
t
CLKH
t
CLKL
t
CLK
t
CLK
t
SKEW[22]
CLKA
CSA
W/RA
MBA
ENA
FF/IR
A
0
35
CLKB
EF/OR
CSB
W/RB
MBB
ENB
B
0
35
EF Flag Timing and First Data Read Fall Through when FIFO is Empty (CY Standard Mode)
[20]
相關PDF資料
PDF描述
CY7C43623 256 x36 Unidirectional Synchronous FIFO w/ Bus Matching(256 x36 單向同步先進先出帶總線匹配)
CY7C43643 1K x36 Unidirectional Synchronous FIFO w/ Bus Matching(1K x36 單向同步先進先出帶總線匹配)
CY7C43663 4K x36 Unidirectional Synchronous FIFO w/ Bus Matching(4K x36 單向同步先進先出帶總線匹配)
CY7C43683 16K x36 Unidirectional Synchronous FIFO w/ Bus Matching(16K x36 單向同步先進先出帶總線匹配)
CY7C43634 512 x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(512 x36 x2 雙向同步先進先出 帶總線匹配)
相關代理商/技術參數(shù)
參數(shù)描述
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CY7C43643-15AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43643AV-10AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP
CY7C43643AV-15AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP
CY7C43643AV-7AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP