參數(shù)資料
型號: CY7C43644AV
廠商: Cypress Semiconductor Corp.
英文描述: 3.3V 1Kx36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 1K x36 x2 雙向同步先進先出帶總線匹配)
中文描述: 3.3 1Kx36 x2雙向同步FIFO瓦特/總線匹配(3.3每1000 x36 x2雙向同步先進先出帶總線匹配)
文件頁數(shù): 9/38頁
文件大?。?/td> 581K
代理商: CY7C43644AV
CY7C43644AV
CY7C43664AV/CY7C43684AV
9
PRELIMINARY
Switching Waveforms
Notes:
11. Master Reset is performed in the same manner for FIFO2 to load X2 and Y2 with a preset value.
12. PRS1 must be HIGH during Master Reset.
FIFO1 Master Reset Loading X1 and Y1 with a Preset Value of Eight
CLKA
t
RSF
t
RSF
t
RSF
t
WFF
t
FSS
t
FSH
t
SPMS
t
SPMH
t
BES
t
BEH
t
RSTS
t
RSTS
t
FWS
CLKB
MRS1
BE/FWFT
SPM
FS1/SEN,
FS0/SD
FFA/IRA
EFB/ORB
AEB
AFA
MBF1
[11, 12]
t
RSF
t
RSF
FWFT
BE
相關PDF資料
PDF描述
CY7C43684AV 3.3V 16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 16K x36 x2 雙向同步先進先出帶總線匹配)
CY7C43666AV 3.3V 4K x36/x18x2 Tri Bus FIFO(3.3V 4K x36/x18x2 三路總線先進先出)
CY7C43686AV 3.3V 16K x36/x18x2 Tri Bus FIFO(3.3V 16K x36/x18x2 三路總線先進先出)
CY7C453 2Kx9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的2Kx9可級聯(lián)定時的先進先出)
CY7C451 512x9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的512x9可級聯(lián)定時的先進先出)
相關代理商/技術參數(shù)
參數(shù)描述
CY7C43644AV-10AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 1K x 36 x 2 128-Pin TQFP
CY7C43663-15AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43664-7AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43682-15AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43683-10AI 制造商:Rochester Electronics LLC 功能描述:- Bulk