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參數(shù)資料
| 型號： | CY7C43686 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16K x36/x18x2 Tri Bus FIFO(16K x36/x18x2 三路總線先進(jìn)先出) |
| 中文描述： | 16K的x36/x18x2三總線的FIFO（16K的x36/x18x2三路總線先進(jìn)先出） |
| 文件頁數(shù)： | 29/40頁 |
| 文件大?。?/td> | 577K |
| 代理商： | CY7C43686 |
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CY7C43626
CY7C43636/CY7C43646
CY7C43666/CY7C43686
29
PRELIMINARY
Notes:
53. If Port C is configured for word size, data can be written to the Mail2 register using C
. In this first case A
0
–
17
will have valid data (A
will be
indeterminate). If Port C is configured for byte size, data can be written to the Mail2 Register using B
0
–
8
(B
9
–
17
are don
’
t care inputs). In this second case,
A
will have valid data (A
will be indeterminate).
54. Retransmit is performed in the same manner for FIFO2.
55. Clocks are free-running in this case.
56. The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at t
RTR
.
57. For the synchronous PAE and PAF flags (SMODE), an appropriate clock cycle is necessary after t
RTR
to update these flags.
Switching Waveforms
(continued)
t
ENH
t
ENS
t
DH
t
DS
W1
t
PMF
t
PMF
t
EN
t
MDV
t
PMR
t
ENS
t
ENH
t
DIS
FIFO2 Output Register
W1 (Remains valid in Mail2 Register after read)
CLKC
MBC
WENC
C
0
–
17
CLKA
MBF2
CSA
W/RA
MBA
ENA
A
0
35
Timing for Mail2 Register and MBF2 Flag (CY Standard and FWFT Modes)
[53]
FIFO1 Retransmit Timing
RENB
RT1
t
PRT
t
RTR
EFB/FFA
[54, 55, 56, 57]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C43662AV | 3.3V 4K x36 x2 Bidirectional Synchronous FIFO(3.3V 4K x36 x2 雙向同步先進(jìn)先出) |
| CY7C43682AV | 3.3V 16K x36 x2 Bidirectional Synchronous FIFO(3.3V 16K x36 x2 雙向同步先進(jìn)先出) |
| CY7C43663AV | 3.3V 4K x36 Unidirectional Synchronous FIFO w/ Bus Matching(3.3V 4K x36 單向同步先進(jìn)先出帶總線匹配) |
| CY7C43683AV | 3.3V 16K x36 Unidirectional Synchronous FIFO w/ Bus Matching(3.3V 16K x36 單向同步先進(jìn)先出帶總線匹配) |
| CY7C43664AV | 3.3V 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 4K x36 x2 雙向同步先進(jìn)先出帶總線匹配) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43686-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43686AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Triple Depth/Width Tri-Bus 16K x 36/16K x 18 x 2 128-Pin TQFP |
| CY7C439-40DMB | 制造商:Cypress Semiconductor 功能描述: |
| CY7C441-14JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 512 x 9 32-Pin PLCC |
| CY7C441-30JC | 制造商:Cypress Semiconductor 功能描述:FIFO, 512 x 9, Synchronous, 32 Pin, Plastic, PLCC |
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