參數(shù)資料
型號(hào)： CY7C63310
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
中文描述： enCoRe II還低速USB外設(shè)控制器（enCoRe II還低速的USB外設(shè)控制器）
文件頁數(shù)： 34/74頁
文件大?。?/td> 1441K
代理商： CY7C63310
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 34 of 74
Table 14-8. P0.5/TIO0 – P0.6/TIO1 Configuration (P05CR–P06CR) [0x0A–0x0B] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
TIO Output
Int Enable
Int Act Low
TTL Thresh
Reserved
Open Drain
Pull-up Enable
Output Enable
Read/Write
–
R/W
R/W
R/W
–
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
These registers control the operation of pins P0.5 through P0.6, respectively. These registers exist in all enCoRe II parts.
P0.5 and P0.6 are shared with TIO0 and TIO1, respectively. To use these pins as Capture Timer inputs, configure them as inputs
by clearing the corresponding Output Enable. To use TIO0 and TIO1 as Timer outputs, set the TIOx Output and Output Enable
bits. If these pins are configured as outputs and the TIO Output bit is clear, firmware can control the TIO0 and TIO1 inputs by
writing the value to the P0.5 and P0.6 data bits in the P0 Data Register
Regardless of whether either pin is used as a TIO or GPIO pin the Int Enable, Int act Low, TTL Threshold, Open Drain, and Pull-
up Enable control the behavior of the pin.
TIO0(P0.5) when enabled outputs a positive pulse from the 1024-
μ
s interval timer. This is the same signal that is used internally
to generate the 1024-
μ
s timer interrupt. This signal is not gated by the interrupt enable state.
TIO1(P0.6) when enabled outputs a positive pulse from the programmable interval timer. This is the same signal that is used
internally to generate the programmable timer interval interrupt. This signal is not gated by the interrupt enable state
The P0.5/TIO0 and P0.6/TIO1 pins are individually configured with the P05CR (0x0A) and P06CR (0x0B), respectively
Table 14-9. P0.7 Configuration (P07CR) [0x0C] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
TTL Thresh
Reserved
Open Drain
Pull-up Enable
Output Enable
Read/Write
–
R/W
R/W
R/W
–
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
This register controls the operation of pin P0.7. The P0.7 pin only exists in the CY7C638(2/3)3
Table 14-10. P1.0/D+ Configuration (P10CR) [0x0D] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
Reserved
PS/2 Pull-up
Enable
Output Enable
Read/Write
R/W
R/W
R/W
–
–
–
R/W
R/W
Default
0
0
0
0
0
0
0
0
This register controls the operation of the P1.0 (D+) pin when the USB interface is not enabled, allowing the pin to be used as
a PS2 interface or a GPIO. See
Table 21-1
for information on enabling USB. When USB is enabled, none of the controls in this
register have any affect on the P1.0 pin.
Note
: The P1.0 is an open drain only output. It can actively drive a signal low, but cannot actively drive a signal high.
Bit 1:
PS/2 Pull-up Enable
0 = Disable the 5K ohm pull-up resistors
1 = Enable 5K ohm pull-up resistors for both P1.0 and P1.1. Enable the use of the P1.0 (D+) and P1.1 (D–) pins as a PS2 style
interface
Table 14-11. P1.1/D– Configuration (P11CR) [0x0E] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
Reserved
Open Drain
Reserved
Output Enable
Read/Write
–
R/W
R/W
–
–
R/W
–
R/W
Default
0
0
0
0
0
0
0
0
This register controls the operation of the P1.1 (D–) pin when the USB interface is not enabled, allowing the pin to be used as
a PS2 interface or a GPIO. See
Table 21-1
for information on enabling USB. When USB is enabled, none of the controls in this
register have any affect on the P1.1 pin. When USB is disabled, the 5K ohm pull-up resistor on this pin can be enabled by the
PS/2 Pull-up Enable bit of the P10CR Register (
Table 14-10
)
Note
: There is no 2 mA sourcing capability on this pin. The pin can only sink 5 mA at V
OL3
(
Section 26.0
)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C63310-PXC 功能描述:USB 接口集成電路 USB 3K Flash 128 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63310-SXC 功能描述:USB 接口集成電路 USB Peripheral Cntrl 3K/128 16-SOIC RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63310-SXCES 制造商:Cypress Semiconductor 功能描述:
CY7C634121C-PVXC 制造商:Cypress Semiconductor 功能描述:
CY7C634121C-PXC 制造商:Cypress Semiconductor 功能描述:
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