參數(shù)資料
型號： CY7C63722-XC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
中文描述： 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, UUC25
封裝： DIE-25
文件頁數(shù)： 50/58頁
文件大小： 1236K
代理商： CY7C63722-XC
FOR
FOR
enCoRe
USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 50 of 58
26.0
Switching Characteristics
Parameter
Description
Internal Clock Mode
Internal Clock Frequency
Internal Clock Frequency, USB
mode
Min.
Max.
Unit
Conditions
F
ICLK
F
ICLK2
5.7
5.91
6.3
6.09
MHz
MHz
Internal Clock Mode enabled
Internal Clock Mode enabled, Bit 2 of register
0xF8h is set (Precision USB Clocking)
[12]
External Oscillator Mode
Input Clock Cycle Time
T
CYC
164.2
169.2
ns
USB Operation, with External ±1.5%
Ceramic Resonator or Crystal
T
CH
T
CL
Clock HIGH Time
Clock LOW Time
0.45 t
CYC
0.45 t
CYC
ns
ns
Reset Timing
t
START
t
WAKE
t
WATCH
Time-out Delay after LVR/BOR
Internal Wake-up Period
WatchDog Timer Period
24
1
10.1
60
5
14.6
ms
ms
ms
Enabled Wake-up Interrupt
[13]
F
OSC
= 6 MHz
USB Driver Characteristics
Transition Rise Time
Transition Rise Time
Transition Fall Time
Transition Fall Time
Rise/Fall Time Matching
Output Signal Crossover
Voltage
[18]
T
R
T
R
T
F
T
F
T
RFM
V
CRS
75
ns
ns
ns
ns
%
V
CLoad = 200 pF (10% to 90%
[4]
)
CLoad = 600 pF (10% to 90%
[4]
)
CLoad = 200 pF (10% to 90%
[4]
)
CLoad = 600 pF (10% to 90%
[4]
)
t
r
/t
f[4, 14]
CLoad = 200 to 600 pF
[4]
300
75
300
125
2.0
80
1.3
USB Data Timing
Low Speed Data Rate
Receiver Data Jitter Tolerance
Receiver Data Jitter Tolerance
Differential to EOP transition Skew
EOP Width at Receiver
Source EOP Width
Differential Driver Jitter
Differential Driver Jitter
Width of SE0 during Diff. Transition
T
DRATE
T
DJR1
T
DJR2
T
DEOP
T
EOPR2
T
EOPT
T
UDJ1
T
UDJ2
T
LST
1.4775
–75
–45
–40
670
1.25
–95
–150
1.5225
75
45
100
Mb/s
ns
ns
ns
ns
μ
s
ns
ns
ns
Ave. Bit Rate (1.5 Mb/s ±1.5%)
To Next Transition
[15]
For Paired Transitions
[15]
Note 15
Accepts as EOP
[15]
1.50
95
150
210
To next transition,
Figure 26-5
To paired transition,
Figure 26-5
Non-USB Mode Driver
Characteristics
SDATA/SCK Transition Fall Time
Note 16
T
FPS2
50
300
ns
CLoad = 150 pF to 600 pF
SPI Timing
See
Figures 26-6 to 26-9
[17]
F
CLK
/3; see
Figure 17-1
T
SMCK
T
SSCK
Notes:
12. Initially F
= F
until a USB packet is received.
13. Wake-up time for Wake-up Adjust Bits cleared to 000b (minimum setting)
14. Tested at 200 pF.
15. Measured at cross-over point of differential data signals.
16. Non-USB Mode refers to driving the D–/SDATA and/or D+/SCLK pins with the Control Bits of the USB Status and Control Register, with Control Bit 2 HIGH.
17. SPI timing specified for capacitive load of 50 pF, with GPIO output mode = 01 (medium low drive, strong high drive).
18. Per the USB 2.0 Specification, Table 7.7, Note 10, the first transition from the Idle state is excluded.
SPI Master Clock Rate
SPI Slave Clock Rate
2
MHz
MHz
2.2
相關(guān)PDF資料
PDF描述
CY7C63723-SC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
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