參數(shù)資料
型號: CY7C63723-PC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
中文描述: 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDIP18
封裝: 0.300 INCH, PLASTIC, DIP-18
文件頁數(shù): 7/58頁
文件大?。?/td> 1236K
代理商: CY7C63723-PC
FOR
FOR
enCoRe
USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 7 of 58
3.0
Logic Block Diagram
XTALIN/P2.1
4.0
Pin Configurations
5.0
Pin Assignments
Name
I/O
I/O
CY7C63723
18-Pin
12
13
1, 2, 3, 4,
15, 16, 17, 18
CY7C63743
24-Pin
CY7C63722
25-Pad
Description
D–/SDATA,
D+/SCLK
P0[7:0]
15
16
16
17
USB differential data lines (D– and D+), or PS/2 clock
and data signals (SDATA and SCLK)
GPIO Port 0 capable of sinking up to 50 mA/pin, or
sinking controlled low or high programmable current.
Can also source 2 mA current, provide a resistive
pull-up, or serve as a high-impedance input. P0.0 and
P0.1 provide inputs to Capture Timers A and B, respec-
tively.
IO Port 1 capable of sinking up to 50 mA/pin, or sinking
controlled low or high programmable current. Can also
source 2 mA current, provide a resistive pull-up, or
serve as a high-impedance input.
I/O
1, 2, 3, 4,
21, 22, 23, 24
1, 2, 3, 4,
22, 23, 24, 25
P1[7:0]
I/O
5, 14
5, 6, 7, 8,
17, 18, 19, 20
5, 6, 7, 8,
18, 19, 20, 21
Wake-Up
Timer
12-bit
Timer
USB &
PS/2
D+,D–
P1.0–P1.7
Interrupt
Controller
Port 0
GPIO
P0.0–P0.7
8-bit
RISC
Core
Xtal
RAM
256 Byte
EPROM
8K Byte
Brown-out
Reset
Xcvr
Watch
Dog
Timer
3.3V
Port 1
GPIO
Capture
Timers
USB
Engine
Internal
Oscillator
Oscillator
Low
Voltage
Reset
Regulator
SPI
XTALOUT
VREG/P2.0
1
2
3
4
5
6
7
8
9
10
11
12
15
14
13
16
17
18
19
20
22
21
P0.0
P0.1
P0.2
P0.3
P1.0
P1.2
P1.4
P1.6
VSS
VPP
VREG/P2.0
XTALIN/P2.1
P0.6
P0.7
P1.5
P1.7
P1.1
P1.3
D+/SCLK
D–/SDATA
VCC
XTALOUT
24
23
P0.4
P0.5
24-pin SOIC/PDIP
CY7C63743
1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
16
18
17
P0.0
P0.1
P0.2
P0.3
P1.0
VSS
VPP
VREG/P2.0
XTALIN/P2.1
P0.4
P0.5
P0.6
P0.7
P1.1
D+/SCLK
D–/SDATA
VCC
XTALOUT
18-pin SOIC/PDIP
CY7C63723
Top View
4
5
6
7
8
9
3
1
2
2
2
2
22
20
19
18
1
1
1
1
1
117
D
P0.3
VSS
V
X
V
X
V
D+/SCLK
P0.7
P1.3
P1.5
P1.7
CY7C63722-XC
DIE
10
相關PDF資料
PDF描述
CY7C63743 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743-PC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743C enCoRe USB Combination Low-Speed USB and PS/2 Peripheral Controller(enCoRe USB結合低速USB和PS/2外設控制器)
CY7C63723C enCoRe USB Combination Low-Speed USB and PS/2 Peripheral Controller(enCoRe USB結合低速USB和PS/2外設控制器)
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相關代理商/技術參數(shù)
參數(shù)描述
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