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USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 3 of 58
16.0 PS/2 OPERATION .......................................................................................................................27
17.0 SERIAL PERIPHERAL INTERFACE (SPI) .................................................................................28
17.1 Operation as an SPI Master ...................................................................................................29
17.2 Master SCK Selection ............................................................................................................29
17.3 Operation as an SPI Slave .....................................................................................................29
17.4 SPI Status and Control ..........................................................................................................30
17.5 SPI Interrupt ...........................................................................................................................31
17.6 SPI Modes for GPIO Pins ......................................................................................................31
18.0 12-BIT FREE-RUNNING TIMER .................................................................................................31
19.0 TIMER CAPTURE REGISTERS .................................................................................................32
20.0 PROCESSOR STATUS AND CONTROL REGISTER ...............................................................35
21.0 INTERRUPTS ..............................................................................................................................36
21.1 Interrupt Vectors ....................................................................................................................37
21.2 Interrupt Latency ....................................................................................................................37
21.3 Interrupt Sources ...................................................................................................................37
22.0 USB MODE TABLES ..................................................................................................................42
23.0 REGISTER SUMMARY ...............................................................................................................47
24.0 ABSOLUTE MAXIMUM RATINGS .............................................................................................48
25.0 DC CHARACTERISTICS ............................................................................................................48
26.0 SWITCHING CHARACTERISTICS .............................................................................................50
27.0 ORDERING INFORMATION .......................................................................................................55
28.0 PACKAGE DIAGRAMS ..............................................................................................................55
LIST OF FIGURES
Figure 8-1. Program Memory Space with Interrupt Vector Table ........................................................11
Figure 8-2. Data Memory Organization ...............................................................................................12
Figure 9-1. Clock Oscillator On-chip Circuit .........................................................................................14
Figure 9-2. Clock Configuration Register (Address 0xF8) ...................................................................14
Figure 10-1. Watchdog Reset (WDR, Address 0x26) ..........................................................................17
Figure 12-1. Block Diagram of GPIO Port (one pin shown) .................................................................19
Figure 12-2. Port 0 Data (Address 0x00) .............................................................................................19
Figure 12-3. Port 1 Data (Address 0x01) .............................................................................................19
Figure 12-4. GPIO Port 0 Mode0 Register (Address 0x0A) .................................................................20
Figure 12-5. GPIO Port 0 Mode1 Register (Address 0x0B) .................................................................20
Figure 12-6. GPIO Port 1 Mode0 Register (Address 0x0C) ................................................................20
Figure 12-7. GPIO Port 1 Mode1 Register (Address 0x0D) ................................................................20
Figure 12-8. Port 2 Data Register (Address 0x02) ..............................................................................21
Figure 13-1. USB Status and Control Register (Address 0x1F) ..........................................................23
Figure 14-1. USB Device Address Register (Address 0x10) ...............................................................24
Figure 14-2. Endpoint 0 Mode Register (Address 0x12) .....................................................................25
Figure 14-3. USB Endpoint EP1, EP2 Mode Registers (Addresses 0x14 and 0x16) ..........................26
Figure 14-4. Endpoint 0,1,2 Counter Registers (Addresses 0x11, 0x13 and 0x15) ............................26
Figure 17-1. SPI Block Diagram ..........................................................................................................28
Figure 16-1. Diagram of USB-PS/2 System Connections ...................................................................28
Figure 17-2. SPI Data Register (Address 0x60) ..................................................................................29
Figure 17-3. SPI Control Register (Address 0x61) ..............................................................................30