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參數(shù)資料
| 型號(hào)： | CY7C63743-SC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, MO-119, SOIC-24 |
| 文件頁數(shù)： | 19/58頁 |
| 文件大小： | 1236K |
| 代理商： | CY7C63743-SC |
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FOR
FOR
enCoRe
USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 19 of 58
Port 0 is an 8-bit port; Port 1 contains either 2 bits, P1.1–P1.0 in the CY7C63723, or all 8 bits, P1.7–P1.0 in the CY7C63743 parts.
Each bit can also be selected as an interrupt source for the microcontroller, as explained in Section 21.0.
The data for each GPIO pin is accessible through the Port Data register. Writes to the Port Data register store outgoing data state
for the port pins, while reads from the Port Data register return the actual logic value on the port pins, not the Port Data register
contents.
Each GPIO pin is configured independently. The driving state of each GPIO pin is determined by the value written to the pin’s
Data Register and by two associated pin’s Mode0 and Mode1 bits.
The Port 0 Data Register is shown in
Figure 12-2
, and the Port 1 Data Register is shown in
Figure 12-3
. The Mode0 and Mode1
bits for the two GPIO ports are given in
Figure 12-4
through
Figure 12-7
.
Bit [7:0]: P0[7:0]
1 = Port Pin is logic HIGH
0 = Port Pin is logic LOW
Bit #
7
6
5
4
3
2
1
0
Bit Name
P0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Figure 12-2. Port 0 Data (Address 0x00)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P1
Notes
Pins 7:2 only in CY7C63743
Pins 1:0 in all parts
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Figure 12-3. Port 1 Data (Address 0x01)
GPIO
Pin
V
CC
14 k
GPIO
Mode
Data
Out
Register
Internal
Data Bus
Port Read
Port Write
Interrupt
Enable
Interrupt
Logic
C
To Interrupt
Controller
Q1
Q2
Q3
To Capture Timers (P0.0, P0.1)
and SPI (P0.4–P0.7))
Interrupt
Polarity
2
Threshold Select
SPI Bypass (P0.5–P0.7 only)
(=1 if SPI inactive, or for non-SPI pins)
(Data Reg must be 1
for SPI outputs)
Figure 12-1. Block Diagram of GPIO Port (one pin shown)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C63722 | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
| CY7C63723 | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
| CY7C63723-PC | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
| CY7C63743 | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
| CY7C63743-PC | enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C63743-SXC | 功能描述:IC MCU 8K USB/PS2 LS 24SOIC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| CY7C63743-SXCT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C63801-PXC | 功能描述:USB 接口集成電路 4K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63801-SXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 4K/256 16-SOIC RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63801-SXCES | 制造商:Cypress Semiconductor 功能描述: |
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