參數(shù)資料
型號： CY7C63743-SC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
中文描述： 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO24
封裝： 0.300 INCH, PLASTIC, MO-119, SOIC-24
文件頁數(shù)： 4/58頁
文件大?。?/td> 1236K
代理商： CY7C63743-SC
FOR
FOR
enCoRe
USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 4 of 58
Figure 17-4. SPI Data Timing ..............................................................................................................31
Figure 18-1. Timer LSB Register (Address 0x24) ................................................................................31
Figure 18-2. Timer MSB Register (Address 0x25) ...............................................................................32
Figure 18-3. Timer Block Diagram .......................................................................................................32
Figure 19-1. Capture Timers Block Diagram .......................................................................................33
Figure 19-2. Capture Timer A-Rising, Data Register (Address 0x40) .................................................33
Figure 19-3. Capture Timer A-Falling, Data Register (Address 0x41) .................................................34
Figure 19-4. Capture Timer B-Rising, Data Register (Address 0x42) .................................................34
Figure 19-5. Capture Timer B-Falling, Data Register (Address 0x43) .................................................34
Figure 19-6. Capture Timer Status Register (Address 0x45) ..............................................................34
Figure 19-7. Capture Timer Configuration Register (Address 0x44) ...................................................34
Figure 20-1. Processor Status and Control Register (Address 0xFF) .................................................35
Figure 21-1. Global Interrupt Enable Register (Address 0x20) ............................................................38
Figure 21-2. Endpoint Interrupt Enable Register (Address 0x21) ........................................................39
Figure 21-3. Interrupt Controller Logic Block Diagram ........................................................................40
Figure 21-4. Port 0 Interrupt Enable Register (Address 0x04) ............................................................40
Figure 21-5. Port 1 Interrupt Enable Register (Address 0x05) ............................................................40
Figure 21-6. Port 0 Interrupt Polarity Register (Address 0x06) ............................................................41
Figure 21-7. Port 1 Interrupt Polarity Register (Address 0x07) ............................................................41
Figure 21-8. GPIO Interrupt Diagram ..................................................................................................41
Figure 26-1. Clock Timing ....................................................................................................................51
Figure 26-2. USB Data Signal Timing ..................................................................................................51
Figure 26-3. Receiver Jitter Tolerance ................................................................................................52
Figure 26-4. Differential to EOP Transition Skew and EOP Width ......................................................52
Figure 26-5. Differential Data Jitter ......................................................................................................52
Figure 26-7. SPI Slave Timing, CPHA = 0 ...........................................................................................53
Figure 26-6. SPI Master Timing, CPHA = 0 .........................................................................................53
Figure 26-8. SPI Master Timing, CPHA = 1 .........................................................................................54
Figure 26-9. SPI Slave Timing, CPHA = 1 ...........................................................................................54
LIST OF TABLES
Table 8-1. I/O Register Summary ........................................................................................................13
Table 11-1. Wake-up Timer Adjust Settings ........................................................................................18
Table 12-1. Ports 0 and 1 Output Control Truth Table ........................................................................21
Table 13-1. Control Modes to Force D+/D– Outputs ...........................................................................24
Table 17-1. SPI Pin Assignments ........................................................................................................31
Table 19-1. Capture Timer Prescalar Settings (Step size and range for FCLK = 6 MHz) ...................35
Table 21-1. Interrupt Vector Assignments ...........................................................................................37
Table 22-1. USB Register Mode Encoding for Control and Non-Control Endpoints ............................42
Table 22-2. Decode table for
Table 22-3
: “Details of Modes for Differing Traffic Conditions” .............44
Table 22-3. Details of Modes for Differing Traffic Conditions ..............................................................45
Table 28-1. CY7C63722-XC Probe Pad Coordinates in microns ((0,0) to bond pad centers) ............57
相關(guān)PDF資料
PDF描述
CY7C63722 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63723 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63723-PC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743-PC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C63743-SXC 功能描述:IC MCU 8K USB/PS2 LS 24SOIC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
CY7C63743-SXCT 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C63801-PXC 功能描述:USB 接口集成電路 4K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63801-SXC 功能描述:USB 接口集成電路 USB Peripheral Cntrl 4K/256 16-SOIC RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63801-SXCES 制造商:Cypress Semiconductor 功能描述:
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