參數(shù)資料
型號(hào)： CY7C63743C
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe USB Combination Low-Speed USB and PS/2 Peripheral Controller(enCoRe USB結(jié)合低速USB和PS/2外設(shè)控制器)
中文描述： 的enCoRe USB的組合低速USB和PS / 2外設(shè)控制器（的enCoRe的USB結(jié)合低速的USB和的PS / 2外設(shè)控制器）
文件頁數(shù)： 15/49頁
文件大?。?/td> 1942K
代理商： CY7C63743C
CY7C63722C
CY7C63723C
CY7C63743C
FOR
FOR
Document #: 38-08022 Rev. *C
Page 15 of 49
Bit [7:0]: P0[7:0]
1 = Port Pin is logic HIGH
0 = Port Pin is logic LOW
Bit [7:0]: P1[7:0]
1 = Port Pin is logic HIGH
0 = Port Pin is logic LOW
Bit [7:0]: P0[7:0] Mode 0
1 = Port 0 Mode 0 is logic HIGH
0 = Port 0 Mode 0 is logic LOW
Bit [7:0]: P0[7:0] Mode 1
1 = Port Pin Mode 1 is logic HIGH
0 = Port Pin Mode 1 is logic LOW
Bit [7:0]: P1[7:0] Mode 0
1 = Port Pin Mode 0 is logic HIGH
0 = Port Pin Mode 0 is logic LOW
Bit [7:0]: P1[7:0] Mode 1
1 = Port Pin Mode 1 is logic HIGH
0 = Port Pin Mode 1 is logic LOW
Each pin can be independently configured as high-impedance
inputs, inputs with internal pull-ups, open drain outputs, or
traditional CMOS outputs with selectable drive strengths.
The driving state of each GPIO pin is determined by the value
written to the pin’s Data Register and by its associated Mode0
and Mode1 bits.
Table 12-1
lists the configuration states
based on these bits. The GPIO ports default on reset to all
Data and Mode Registers cleared, so the pins are all in a
high-impedance state. The available GPIO output drive
strength are:
Hi-Z Mode
(Mode1 = 0 and Mode0 = 0)
Q1, Q2, and Q3 (
Figure 12-1
) are OFF. The GPIO pin is not
driven internally. Performing a read from the Port Data Reg-
ister return the actual logic value on the port pins.
Low Sink Mode
(Mode1 = 1, Mode0 = 0, and the pin’s Data
Register = 0)
Q1 and Q3 are OFF. Q2 is ON. The GPIO pin is capable of
sinking 2 mA of current.
Medium Sink Mode
(Mode1 = 0, Mode0 = 1, and the pin’s
Data Register = 0)
Q1 and Q3 are OFF. Q2 is ON. The GPIO pin is capable of
sinking 8 mA of current.
High Sink Mode
(Mode1 = 1, Mode0 = 1, and the pin’s Data
Register = 0)
Q1 and Q3 are OFF. Q2 is ON. The GPIO pin is capable of
sinking 50 mA of current.
High Drive Mode
(Mode1 = 0 or 1, Mode0 = 1, and the pin’s
Data Register = 1)
Q1 and Q2 are OFF. Q3 is ON. The GPIO pin is capable of
sourcing 2 mA of current.
Resistive Mode
(Mode1 = 1, Mode0 = 0, and the pin’s Data
Register = 1)
Q2 and Q3 are OFF. Q1 is ON. The GPIO pin is pulled up
with an internal 14-k
resistor.
Note that open drain mode can be achieved by fixing the Data
and Mode1 Registers LOW, and switching the Mode0 register.
Input thresholds are CMOS, or TTL as shown in the table (See
Section 25.0 for the input threshold voltage in TTL or CMOS
modes). Both input modes include hysteresis to minimize
noise sensitivity. In suspend mode, if a pin is used for a
wake-up interrupt using an external R-C circuit, CMOS mode
is preferred for lowest power.
Bit #
7
6
5
4
3
2
1
0
Bit Name
P0
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
Reset
0
0
0
0
0
0
0
0
Figure 12-2. Port 0 Data (Address 0x00)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P1
Notes
Pins 7:2 only in CY7C63743C
Pins 1:0 in
all parts
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
Reset
0
0
0
0
0
0
0
0
Figure 12-3. Port 1 Data (Address 0x01)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P0[7:0] Mode0
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 12-4. GPIO Port 0 Mode0 Register (Address 0x0A)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P0[7:0] Mode1
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 12-5. GPIO Port 0 Mode1 Register (Address 0x0B)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P1[7:0] Mode0
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 12-6. GPIO Port 1 Mode0 Register (Address 0x0C)
Bit #
7
6
5
4
3
2
1
0
Bit Name
P1[7:0] Mode1
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 12-7. GPIO Port 1 Mode1 Register (Address 0x0D)
相關(guān)PDF資料
PDF描述
CY7C63723C enCoRe USB Combination Low-Speed USB and PS/2 Peripheral Controller(enCoRe USB結(jié)合低速USB和PS/2外設(shè)控制器)
CY7C63803 enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
CY7C63310 enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
CY7C63801 enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
CY7C63823 enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C63743C-PXC 功能描述:輸入/輸出控制器接口集成電路 USB Combo Lo Spd PS/2 Periphrl Cntrlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-QXC 功能描述:輸入/輸出控制器接口集成電路 LO Speed 3 Endpoint USB COM RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-SXC 功能描述:輸入/輸出控制器接口集成電路 USB Combo Lo Spd PS/2 Periphrl Cntrlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-SXCT 功能描述:輸入/輸出控制器接口集成電路 USB/PS/2 Combo LoSpd Peripheral Controlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743-PC 功能描述:IC MCU 8K LS USB/PS-2 24-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
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