參數(shù)資料
型號(hào): CY7C63801
廠商: Cypress Semiconductor Corp.
英文描述: enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
中文描述: enCoRe II還低速USB外設(shè)控制器(enCoRe II還低速的USB外設(shè)控制器)
文件頁數(shù): 42/74頁
文件大小: 1441K
代理商: CY7C63801
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 42 of 74
Figure 16-2. Programmable Interval Timer Block Diagram
S y s te m
C lo c k
C lo c k
T im e r
C o n fig u ra tio n
S ta tu s a n d
C o n tro l
1 2 -b it
re lo a d
v a lu e
1 2 -b it d o w n
c o u n te r
1 2 -b it
re lo a d
c o u n te r
In te rru p t
C o n tro lle r
Table 16-11. Timer Configuration (TMRCR) [0x2A] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
First Edge Hold
8-bit Capture Prescale [2:0]
Cap0 16bit
Enable
Reserved
Read/Write
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit 7:
First Edge Hold
The First Edge Hold function applies to all four capture timers.
0 = The time of the most recent edge is held in the Capture Timer Data Register. If multiple edges have occurred since reading
the capture timer, the time for the most recent one will be read
1 = The time of the first occurrence of an edge is held in the Capture Timer Data Register until the data is read. Subsequent
edges are ignored until the Capture Timer Data Register is read.
Bit [6:4]:
8-bit Capture Prescale [2:0]
This field controls which 8 bits of the 16 Free Running Timer are captured when in bit mode
0 0 0 = capture timer[7:0]
0 0 1 = capture timer[8:1]
0 1 0 = capture timer[9:2]
0 1 1 = capture timer[10:3]
1 0 0 = capture timer[11:4]
1 0 1 = capture timer[12:5]
1 1 0 = capture timer[13:6]
1 1 1 = capture timer[14:7]
Bit 3:
Cap0 16-bit Enable
0 = Capture 0 16-bit mode is disabled
1 = Capture 0 16-bit mode is enabled. Capture 1 is disabled and the Capture 1 rising and falling registers are used as an extension
to the Capture 0 registers—extending them to 16 bits
Bit [2:0]:
Reserved
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