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參數資料
| 型號： | CY7C63813 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設控制器) |
| 中文描述： | enCoRe II還低速USB外設控制器（enCoRe II還低速的USB外設控制器） |
| 文件頁數： | 52/74頁 |
| 文件大?。?/td> | 1441K |
| 代理商： | CY7C63813 |
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CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 52 of 74
19.0
USB Regulator Output
19.1
VREG Control
20.0
USB Serial Interface Engine (SIE)
The SIE allows the microcontroller to communicate with the
USB host at low-speed data rates (1.5 Mbps). The SIE
simplifies the interface between the microcontroller and USB
by incorporating hardware that handles the following USB bus
activity independently of the microcontroller:
Translate the encoded received data and format the data to
be transmitted on the bus.
CRC checking and generation. Flag the microcontroller if
errors exist during transmission.
Address checking. Ignore the transactions not addressed
to the device.
Send appropriate ACK/NAK/STALL handshakes.
Token type identification (SETUP, IN, or OUT). Set the
appropriate token bit once a valid token is received.
Place valid received data in the appropriate endpoint FIFOs.
Send and update the data toggle bit (Data1/0).
Bit stuffing/unstuffing.
Firmware is required to handle the rest of the USB interface
with the following tasks:
Coordinate enumeration by decoding USB device requests.
Fill and empty the FIFOs.
Suspend/Resume coordination.
Verify and select Data toggle values.
Table 19-1. VREG Control Register (VREGCR) [0x73] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Keep Alive
VREG Enable
Read/Write
–
–
–
–
–
–
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit [7:2]:
Reserved
Bit 1:
Keep Alive
Keep Alive, when set, allows the voltage regulator to source up to 20 μA of current when the voltage regulator is disabled,
P12CR[0],P12CR[7] must be cleared.
0 = Disabled
1 = Enabled
Bit 0:
VREG Enable
This bit turns on the 3.3V voltage regulator. The voltage regulator only functions within specifications when V
CC
is above 4.35V.
This block must not be enabled when V
CC
is below 4.35V—although no damage or irregularities will occur if it is enabled below 4.35V
0 = Disable the 3.3V voltage regulator output on the VREG/P1.2 pin
1 = Enable the 3.3V voltage regulator output on the VREG/P1.2 pin. GPIO functionality of P1.2 is disabled
Note:
Use of the alternate drive on pins P1.3–P1.6 requires that the VREG Enable bit be set to enable the regulator and pro-
vide the alternate voltage
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C63833 | enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設控制器) |
| CY7C65640-LFXC | TetraHub High-speed USB Hub Controller |
| CY7C65640 | TetraHub High-speed USB Hub Controller |
| CY7C65640-LFC | TetraHub High-speed USB Hub Controller |
| CY4602 | TetraHub High-speed USB Hub Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C63813-PXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 18-PDIP RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63813-PXCES | 制造商:Cypress Semiconductor 功能描述: |
| CY7C63813-SXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 18-SOIC RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63813-SXCES | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C63823-3XWC | 制造商:Cypress Semiconductor 功能描述:USB - Bulk 制造商:Cypress Semiconductor 功能描述:Bulk / USB Low-Speed Peripherals |
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