參數(shù)資料
型號(hào)： CY7C63833
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
中文描述： enCoRe II還低速USB外設(shè)控制器（enCoRe II還低速的USB外設(shè)控制器）
文件頁(yè)數(shù)： 2/74頁(yè)
文件大?。?/td> 1441K
代理商： CY7C63833
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 2 of 74
2.0
Introduction
Cypress has reinvented its leadership position in the low-
speed USB market with a new family of innovative microcon-
trollers. Introducing enCoRe II USB — “enhanced Component
Reduction.” Cypress has leveraged its design expertise in
USB solutions to advance its family of low-speed USB micro-
controllers, which enable peripheral developers to design new
products with a minimum number of components. The
enCoRe II USB technology builds on to the enCoRe family.
The enCoRe family has an integrated oscillator that eliminates
the external crystal or resonator, reducing overall cost. Also
integrated into this chip are other external components
commonly found in low-speed USB applications such as pull-
up resistors, wake-up circuitry, and a 3.3V regulator. All of this
reduces the overall system cost.
The enCoRe II is an 8-bit Flash-programmable microcontroller
with integrated low-speed USB interface. The instruction set
has been optimized specifically for USB and PS/2 operations,
although the microcontrollers can be used for a variety of other
embedded applications.
The enCoRe II features up to 20 general-purpose I/O (GPIO)
pins to support USB, PS/2 and other applications. The I/O pins
are grouped into four ports (Port 0 to 3). The pins on Port 0 and
Port 1 may each be configured individually while the pins on
Ports 2 and 3 may only be configured as a group. Each GPIO
port supports high-impedance inputs, configurable pull up,
open drain output, CMOS/TTL inputs, and CMOS output with
up to five pins that support programmable drive strength of up
to 50 mA sink current. GPIO Port 1 features four pins that
interface at a voltage level of 3.3 volts. Additionally, each I/O
pin can be used to generate a GPIO interrupt to the microcon-
troller. Each GPIO port has its own GPIO interrupt vector; in
addition GPIO Port 0 has three dedicated pins that have
independent interrupt vectors (P0.2 - P0.4).
The enCoRe II features an internal oscillator. With the
presence of USB traffic, the internal oscillator can be set to
precisely tune to USB timing requirements (24 MHz ±1.5%).
Optionally, an external 12 MHz or 24 MHz clock can be used
to provide a higher precision reference for USB operation. The
clock generator provides the 12 MHz and 24 MHz clocks that
remain internal to the microcontroller. The enCoRe II also has
a 12-bit programmable interval timer and a 16-bit Free-
Running Timer with Capture Timer registers. In addition, the
enCoRe II includes a Watchdog timer and a vectored interrupt
controller
The enCoRe II has up to eight Kbytes of Flash for user’s code
and up to 256 bytes of RAM for stack space and user
variables.
The Power-on reset circuit detects logic when power is applied
to the device, resets the logic to a known state, and begins
executing instructions at Flash address 0x0000. When power
falls below a programmable trip voltage generates reset or
may be configured to generate interrupt. There is a Low-
voltage detect circuit that detects when V
CC
drops below a
programmable trip voltage. It may be configurable to generate
an LVD interrupt to inform the processor about the low-voltage
event. POR and LVD share the same interrupt. There is no
separate interrupt for each. The Watchdog timer can be used
to ensure the firmware never gets stalled in an infinite loop.
The microcontroller supports 22 maskable interrupts in the
vectored interrupt controller. Interrupt sources include a USB
bus reset, LVR/POR, a programmable interval timer, a
1.024-ms output from the Free Running Timer, three USB
endpoints, two capture timers, four GPIO Ports, three Port 0
pins, two SPI, a 16-bit free running timer wrap, an internal
sleep timer, and a bus active interrupt. The sleep timer causes
periodic interrupts when enabled. The USB endpoints interrupt
after a USB transaction complete is on the bus. The capture
timers interrupt whenever a new timer value is saved due to a
selected GPIO edge event. A total of seven GPIO interrupts
support both TTL or CMOS thresholds. For additional flexi-
bility, on the edge sensitive GPIO pins, the interrupt polarity is
programmable to be either rising or falling.
The free-running 16-bit timer provides two interrupt sources:
the 1.024 ms outputs and the free running counter wrap
interrupt. The programmable interval timer can provide up to
1
μ
sec resolution and provides an interrupt everytime it
expires. These timers can be used to measure the duration of
an event under firmware control by reading the desired timer
at the start and at the end of an event, then calculating the
difference between the two values. The two 8-bit capture timer
registers save a programmable 8-bit range of the free-running
timer when a GPIO edge occurs on the two capture pins (P0.5,
P0.6). The two 8-bit captures can be ganged into a single
16-bit capture.
The enCoRe II includes an integrated USB serial interface
engine (SIE) that allows the chip to easily interface to a USB
host. The hardware supports one USB device address with
three endpoints.
The USB D+ and D– pins can optionally be used as PS/2
SCLK and SDATA signals so that products can be designed to
respond to either USB or PS/2 modes of operation. PS/2
operation is supported with internal 5 K
pull-up resistors on
P1.0 (D+) and P1.1 (D–) and an interrupt to signal the start of
PS/2 activity. In USB mode, the integrated 1.5 K
pull-up
resistor on D– can be controlled under firmware. No external
components are necessary for dual USB and PS/2 systems,
and no GPIO pins need to be dedicated to switching between
modes.
The enCoRe II supports in-system programming by using the
D+ and D– pins as the serial programming mode interface.
The programming protocol is not USB.
3.0
Conventions
In this document, bit positions in the registers are shaded to
indicate which members of the enCoRe II family implement the
bits.
Available in all enCoRe II family members
CY7C638xx only
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C638334-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LFXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C63833-LFXC 功能描述:USB 接口集成電路 8K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63833-LTXC 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 32-QFN RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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