參數(shù)資料
型號(hào)： CY7C63833
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
中文描述： enCoRe II還低速USB外設(shè)控制器（enCoRe II還低速的USB外設(shè)控制器）
文件頁(yè)數(shù)： 22/74頁(yè)
文件大?。?/td> 1441K
代理商： CY7C63833
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 22 of 74
10.1.1
The Interval Timer Clock (TITMRCLK), can be sourced from
an external clock, the Internal 24 MHz Oscillator, the Internal
32-KHz Low-power Oscillator, or the Timer Capture clock. A
programmable prescaler of 1, 2, 3 or 4 then divides the
selected source. The 12-bit Programmable Interval Timer is a
simple down counter with a programmable reload value. It
provides a 1
μ
s resolution by default. When the down counter
reaches zero, the next clock is spent reloading. The reload
value can be read and written while the counter is running, but
care must be taken to ensure that the counter does not
Interval Timer Clock (ITMRCLK)
unintentionally reload while the 12-bit reload value is only
partially stored—i.e., between the two writes of the 12-bit
value. The programmable interval timer generates an interrupt
to the CPU on each reload.
The parameters to be set will show up on the device editor
view of PSoC Designer once you place the enCoRe II Timer
User Module. The parameters are PITIMER_Source and
PITIMER_Divider. The PITIMER_Source is the clock to the
timer and the PITMER_Divider is the value the clock is divided
by.
Table 10-5. USB Osclock Clock Configuration (OSCLCKCR) [0x39] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Fine Tune Only
USB Osclock
Disable
Read/Write
–
–
–
–
–
–
R/W
R/W
Default
0
0
0
0
0
0
0
0
This register is used to trim the Internal 24 MHz Oscillator using received low-speed USB packets as a timing reference. The
USB Osclock circuit is active when the Internal 24 MHz Oscillator provides the USB clock
Bit [7:2]:
Reserved
Bit 1:
Fine Tune Only
0 = Enable
1 = Disable the oscillator lock from performing the coarse-tune portion of its retuning. The oscillator lock must be allowed to
perform a coarse tuning in order to tune the oscillator for correct USB SIE operation. After the oscillator is properly tuned this bit
can be set to reduce variance in the internal oscillator frequency that would be caused course tuning
Bit 0:
USB Osclock Disable
0 = Enable. With the presence of USB traffic, the Internal 24 MHz Oscillator precisely tunes to 24 MHz ± 1.5%
1 = Disable. The Internal 24 MHz Oscillator is not trimmed based on USB packets. This setting is useful when the internal
oscillator is not sourcing the USBSIE clock
Table 10-6. Timer Clock Config (TMRCLKCR) [0x31] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
TCAPCLK Divider
TCAPCLK Select
ITMRCLK Divider
ITMRCLK Select
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
1
0
0
0
1
1
1
1
Bit [7:6]:
TCAPCLK Divider [1:0]
TCAPCLK Divider controls the TCAPCLK divisor
0 0 = Divider Value 2
0 1 = Divider Value 4
1 0 = Divider Value 6
1 1 = Divider Value 8
Bit [5:4]:
TCAPCLK Select
The TCAPCLK Select field controls the source of the TCAPCLK
0 0 = Internal 24 MHz Oscillator
0 1 = External clock—external clock at CLKIN (P0.0) input.
1 0 = Internal 32-KHz Low-power Oscillator
1 1 = TCAPCLK Disabled
Note:
The 1024-
μ
s interval timer is based on the assumption that TCAPCLK is running at 4 MHz. Changes in TCAPCLK
frequency will cause a corresponding change in the 1024-
μ
s interval timer frequency
Bit [3:2]:
ITMRCLK Divider
ITMRCLK Divider controls the ITMRCLK divisor.
0 0 = Divider value of 1
0 1 = Divider value of 2
1 0 = Divider value of 3
1 1 = Divider value of 4
Bit [1:0]:
ITMRCLK Select
0 0 = Internal 24 MHz Oscillator
0 1 = External clock—external clock at CLKIN (P0.0) input.
1 0 = Internal 32-KHz Low-power Oscillator
1 1 = TCAPCLK
相關(guān)PDF資料
PDF描述
CY7C65640-LFXC TetraHub High-speed USB Hub Controller
CY7C65640 TetraHub High-speed USB Hub Controller
CY7C65640-LFC TetraHub High-speed USB Hub Controller
CY4602 TetraHub High-speed USB Hub Controller
CY7C65640A TetraHub High-Speed USB Hub Controller(TetraHub高速USB Hub控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C638334-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LFXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C63833-LFXC 功能描述:USB 接口集成電路 8K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63833-LTXC 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 32-QFN RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*