參數(shù)資料
型號: CY7C67200
廠商: Cypress Semiconductor Corp.
英文描述: EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器)
中文描述: 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器(的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器)
文件頁數(shù): 19/82頁
文件大?。?/td> 1719K
代理商: CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 19 of 82
Port A D+ Status
(Bit 13)
The Port A D+ Status bit is a read only bit that indicates the
value of DATA+ on Port A.
1:
D+ is high
0:
D+ is low
Port A D– Status
(Bit 12)
The Port A D– Status bit is a read only bit that indicates the
value of DATA– on Port A.
1:
D– is high
0:
D– is low
LOA
(Bit 10)
The LOA bit selects the speed of Port A.
1:
Port A is set to Low speed mode
0:
Port A is set to Full speed mode
Mode Select
(Bit 9)
The Mode Select bit sets the SIE for host or device operation.
When set for device operation only one USB port is supported.
The active port is selected by the Port Select bit in the Host n
Count Register.
1:
Host mode
0:
Device mode
Port A Resistors Enable
(Bit 7)
The Port A Resistors Enable bit enables or disables the pull
up/pull down resistors on Port A. When enabled, the Mode
Select bit and LOA bit of this register sets the pull up/pull down
resistors appropriately. When the Mode Select is set for Host
mode, the pull down resistors on the data lines (D+ and D–)
are enabled. When the Mode Select is set for Device mode, a
single pull up resistor on either D+ or D–, determined by the
LOA bit, will be enabled. See
Table 8-5
for details.
1:
Enable pull up/pull down resistors
0:
Disable pull up/pull down resistors
Port A Force D± State
(Bits [4:3])
The Port A Force D± State field controls the forcing state of the D+ D– data lines for Port A. This field forces the state of the Port
A data lines independent of the Port Select bit setting. See
Table 8-6
for details.
Suspend Enable
(Bit 2)
The Suspend Enable bit enables or disables the suspend feature on both ports. When suspend is enabled the USB transceivers
are powered down and can not transmit or received USB packets but can still monitor for a wakeup condition.
1:
Enable
suspend
0:
Disable suspend
Port A SOF/EOP Enable
(Bit 0)
The Port A SOF/EOP Enable bit is only applicable in host mode. In Device mode this bit must be written as ‘0’. In host mode this
bit enables or disables SOFs or EOPs for Port A. Either SOFs or EOPs will be generated depending on the LOA bit in the USB
n Control Register when Port A is active.
1:
Enable SOFs or EOPs
0:
Disable SOFs or EOPs
Reserved
All reserved bits must be written as ‘0’.
Table 8-5. USB Data Line Pull Up and Pull Down Resistors
L0A
X
X
1
0
Mode Select
X
1
0
0
Port n Resistors Enable
0
1
1
1
Function
Pull-up/Pull-down on D+ and D– Disabled
Pull-down on D+ and D– Enabled
Pull-up on USB D– Enabled
Pull-up on USB D+ Enabled
Table 8-6. Port A Force D± State
Port A Force D± State
MSB
0
0
1
1
Function
LSB
0
1
0
1
Normal Operation
Force USB Reset, SE0 State
Force J-State.
Force K-State.
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