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參數(shù)資料
| 型號： | CY7C68300C |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-USB AT2LP USB 2.0 to ATA/ATAPI Bridge(EZ-USB AT2LP USB 2.0到ATA/ATAPI橋接器) |
| 中文描述： | 的EZ - USB AT2LP產(chǎn)品的USB 2.0的ATA / ATAPI橋（的EZ - USB AT2LP產(chǎn)品的USB 2.0到ATA / ATAPI接口橋接器） |
| 文件頁數(shù)： | 24/42頁 |
| 文件大小： | 761K |
| 代理商： | CY7C68300C |
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CY7C68300C/CY7C68301C
CY7C68320C/CY7C68321C
Document 001-05809 Rev. *A
Page 24 of 42
0x08
BUTTON_MODE
Bit 7
Button mode (100-pin package only). Sets ATAPUEN,
PWR500# and DRVPWRVLD to become button inputs
returned on bits 2, 1, and 0 of EP1IN. This bit must be set to
‘0’ if the 56-pin packages are used.
0 = Disable button mode.
1 = Enable button mode.
Bit 6
Search ATA bus after RESET to detect non-removable ATA
and ATAPI devices. Systems with only a removable device
(like CF readers) must set this bit to ‘0’. Systems with at least
one non-removable device must set this bit to ‘1’.
0 = Do not search for ATA devices.
1 = Search for ATA devices.
Bit 5
Selects the 100- or 56-pin package pinout configuration.
Using the wrong pinout may result in unpredictable behavior.
0 = Use 56-pin package pinout.
1 = Use 100-pin package pinout.
Bit 4
Drive ATA bus when AT2LP is in suspend. For designs in
which the ATA bus is shared between the AT2LP and
another ATA master (such as an MP3 player), the AT2LP
can place the ATA interface pins in a Hi-Z state when it
enters suspend. For designs that do not share the ATA bus,
the ATA signals must be driven while the AT2LP is in
suspend to avoid floating signals.
0 = Drive ATA signals when AT2LP is in suspend.
1 = Set ATA signals to Hi-Z when AT2LP is in suspend.
Bit 3
Reserved. This bit must be set to ‘0’.
Bit 2
Reserved. This bit must be set to ‘0’
Bit 1
Configure the logical polarity of the DRVPWRVLD input pin.
0 = Active LOW (‘connector ground’ indication)
1 = Active HIGH (power indication from device)
Bit 0
Enable the DRVPWRVLD pin. When this pin is enabled, the
AT2LP enumerates a removable ATA device, like Compact-
Flash or MicroDrive, as the IDE master device. Enabling this
pin also affects other pins related to removable device
operation.
0 = Disable removable ATA device support.
1 = Enable removable ATA device support.
Bits 7:6
Reserved. Must be set to zero.
Bits 5:0
GPIO[5:0] Input and output control. GPIOs can be individ-
ually set as inputs or outputs using these bits.
0 = Hi-Z (pin is an input). The state of the signal connected
to GPIO input pins is reported in the SYSIRQ or HID data.
1 = Output enabled (pin is an output). The state of GPIO
output pins is controlled by the value in address 0x0A.
0x78
SEARCH_ATA_BUS
BIG_PACKAGE
ATA_EN
Reserved
Reserved
Drive Power Valid Polarity
Drive Power Valid Enable
0x09
Reserved
General Purpose IO Pin
Output Enable
0x00
Table 11.Configuration Data Organization
(continued)
Byte
Address
Configuration
Item Name
Configuration
Item Description
Required
Contents
Variable
Contents
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C68300C-100AXC | 功能描述:接口 - 專用 USB Hi Spd Peripherals RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| CY7C68300C-56LFXC | 功能描述:USB 接口集成電路 USB Hi Spd Peripherals RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C68300C-56LTXC | 功能描述:USB 接口集成電路 AT2LP HS-USB RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C68300C-56LTXCKA | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C68300C-56LTXCKM | 制造商:Cypress Semiconductor 功能描述: |
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