參數(shù)資料
型號(hào): CY7C68300C
廠商: Cypress Semiconductor Corp.
英文描述: EZ-USB AT2LP USB 2.0 to ATA/ATAPI Bridge(EZ-USB AT2LP USB 2.0到ATA/ATAPI橋接器)
中文描述: 的EZ - USB AT2LP產(chǎn)品的USB 2.0的ATA / ATAPI橋(的EZ - USB AT2LP產(chǎn)品的USB 2.0到ATA / ATAPI接口橋接器)
文件頁(yè)數(shù): 9/42頁(yè)
文件大?。?/td> 761K
代理商: CY7C68300C
CY7C68300C/CY7C68301C
CY7C68320C/CY7C68321C
Document 001-05809 Rev. *A
Page 9 of 42
30
16
23
SDA
IO
Data signal for I
2
C interface.
(See
“SCL, SDA” on
page 11
).
Apply a 2.2k pull up resistor.
No connect.
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
N/A
N/A
NC
17
18
19
20
21
N/A
N/A
N/A
N/A
N/A
N/A
22
23
24
25
26
27
28
N/A
24
25
26
27
28
N/A
N/A
N/A
N/A
N/A
N/A
29
30
31
32
33
34
35
N/A
V
CC
DD0
DD1
DD2
DD3
V
CC
GND
NC
GND
NC
GND
DD4
DD5
DD6
DD7
GND
V
CC
GND
NC
PWR
IO
[1]
IO
[1]
IO
[1]
IO
[1]
PWR
GND
NC
V
CC
. Connect to 3.3V power source.
ATA data bit 0.
ATA data bit 1.
ATA data bit 2
.
ATA data bit 3
.
V
CC
. Connect to 3.3V power source.
Ground
.
No connect
.
Ground
.
No connect
.
Ground
.
ATA data bit 4
.
ATA data bit 5
.
ATA data bit 6
.
ATA data bit 7
. Apply a 1k pull down to GND.
Ground
.
V
CC
. Connect to 3.3V power source.
Ground
.
No connect
.
Hi-Z
Hi-Z
Hi-Z
Hi-Z
NC
IO
[1]
IO
[1]
IO
[1]
IO
[1]
GND
PWR
GND
NC
Hi-Z
Hi-Z
Hi-Z
Hi-Z
N/A
29
N/A
36
V
CC
PWR
O/Z
[1]
V
CC
. Connect to 3.3V power source.
ATA control
.
DIOW#
[2]
Driven HIGH
(CMOS)
Driven HIGH
(CMOS)
Driven HIGH
(CMOS)
55
30
37
DIOR#
O/Z
[1]
ATA control
.
56
31
38
DMACK#
O/Z
[1]
ATA control
.
57
58
N/A
N/A
N/A
N/A
NC
NC
O
No connect
.
USB suspend indicator.
(See
“LOWPWR#” on
page 13
).
No connect.
LOWPWR#
59
60
61
62
N/A
N/A
NC
NC
N/A
N/A
VBUSPWRD
I
Input
Bus-powered mode selector.
(See
“VBUSPWRD” on
page 14
).
No connect
.
63
64
65
66
67
N/A
N/A
NC
NC
N/A
32
33
N/A
39
40
GND
V
CC
INTRQ
GND
PWR
I
[1]
Ground
.
V
CC
. Connect to 3.3V power source.
ATA interrupt request
.
Input
Table 1. AT2LP Pin Descriptions
Note: (Italic pin names denote pin functionality during CY7C68300A compatibility mode)
(continued)
100
TQFP
56
QFN
56
SSOP
Pin Name
Pin
Type
Default State
at Startup
Pin Description
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