參數(shù)資料
型號(hào): CY8C22213-24LFI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 外設(shè)及接口
英文描述: PSoC Mixed Signal Array
中文描述: MULTIFUNCTION PERIPHERAL, QCC32
封裝: 5 X 5 MM, MLF-32
文件頁(yè)數(shù): 220/304頁(yè)
文件大?。?/td> 2956K
代理商: CY8C22213-24LFI
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SECTION E ANALOG SYSTEM
CY8C22xxx Preliminary Data Sheet
220
Document No. 38-12009 Rev. *D
December 22, 2003
PSoC blocks are user configurable system resources. On-
chip analog PSoC blocks reduce the need for many MCU
part types and external peripheral components. Analog
PSoC blocks are configured to provide a wide variety of
peripheral functions. PSoC Designer Software Integrated
Development Environment provides automated configura-
tion of PSoC blocks by selecting the desired functions.
PSoC Designer then generates the proper configuration
information and prints a device data sheet unique to that
configuration.
Each of the analog blocks has many potential inputs and
several outputs. The inputs to these blocks include analog
signals from external sources, intrinsic analog signals driven
from neighboring analog blocks, or various voltage refer-
ence sources.
There are three analog PSoC block types: Continuous Time
(CT) blocks, and
Type C and Type D Switch Capacitor (SC)
blocks. CT blocks provide continuous time analog functions.
SC blocks provide switched capacitor analog functions.
Some available supported analog functions are 12-bit Incre-
mental and 11-bit Delta-Sigma ADC, successive approxima-
tion ADCs up to 6 bits, DACs up to 8 bits, programmable
gain stages, sample and hold circuits, programmable filters,
comparators, and a temperature sensor.
The analog blocks are organized into columns. There is one
analog column in the CY8C22xxx, which contains one Con-
tinuous Time Block, one Switch Capacitor (SC) Type C, and
one Type D Switch Capacitor (SC). The blocks in a particu-
lar column all run off the same clocking source. The blocks
in a column also share some output bus resources. Refer to
the
Analog Interface, on page 223
for additional information.
There are three outputs from each analog block. (There are
an additional two discrete outputs in the Continuous Time
blocks.)
1.
The analog output bus (ABUS) is an analog bus
resource that is shared by all of the analog blocks in a
column. Only one block in a column can actively drive
this bus at any one time and the user has control of this
output through register settings. This is the only analog
output that can be driven directly to a pin.
2.
The comparator bus (CBUS) is a digital bus resource
that is shared by all of the analog blocks in a column.
Only one block in a column can be actively driving this
bus at any one time and the user has control of this out-
put through register settings.
3.
The local outputs (OUT, plus GOUT, and LOUT in the
Continuous Time blocks) are routed to neighbor blocks.
The various input multiplexer connections (NMux, PMux,
RBotMux, AMux, BMux, and CMux) all use the output
bus from one block as their input.
Three analog PSoC blocks are available separately or com-
bined with the digital PSoC blocks. A precision internal volt-
age reference provides accurate analog comparisons. A
temperature sensor input is provided to the analog PSoC
block array, supporting applications such as battery charg-
ers and data acquisition, without requiring external compo-
nents.
The analog functionality provided is as follows.
A/D and D/A converters, programmable gain blocks,
comparators, and switched capacitor filters.
I
Single ended configuration is cost effective for reason-
able speed and accuracy, and provides a simple inter-
face to most real-world analog inputs and outputs.
I
Support is provided for sensor interfaces, audio codes,
embedded modems, and general-purpose opamp cir-
cuits.
I
Flexible, System on-a-Chip programmability, providing
variations in functions.
I
For a given function, easily selected trade-offs of accu-
racy and resolution with speed, resources (number of
analog blocks ), and power dissipated for that applica-
tion.
I
The analog section is an “Analog Computation Unit,”
providing programmed steering of signal flow and select-
ing functionality through register-based control of analog
switches. It also sets coefficients in Switched Capacitor
Filters and noise shaping (Delta-Sigma) modulators, as
well as program gains or attenuation settings in amplifier
configurations.
I
The architecture provides continuous time blocks and
discrete time (Switched Capacitor) blocks. The continu-
ous time blocks allow selection of precision amplifier or
comparator circuitry, using programmable resistors as
passive configuration and parameter setting elements.
The Switched Capacitor (SC) blocks allow configuration
of DACs, Delta Sigma, Incremental or Successive
Approximation ADCs, or Switched Capacitor filters with
programmable coefficients.
I
相關(guān)PDF資料
PDF描述
CY8C22213-24PI PSoC Mixed Signal Array
CY8C22213-24PVI PSoC Mixed Signal Array
CY8C22213-24SI PSoC Mixed Signal Array
CY8C22213-24SIT PSoC Mixed Signal Array
CY8C24794-SPAX PSoCTM Mixed-Signal Array
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