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參數(shù)資料
| 型號： | CY8C24794-SPLFX |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Environmentally sealed limit switch with Leadwire termination, Rotary Roller Lever actuation, Double Pole Double Throw (DPDT) Circuitry, 5 A (Resistive) ampere rating at 28 Vdc, Military Part Number MS21320-1 |
| 中文描述： | PSoCTM混合信號陣列 |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 366K |
| 代理商： | CY8C24794-SPLFX |
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April 14, 2005
Document No. 38-12018 Rev. *F
2
CY8C24794 Final Data Sheet
PSoC Overview
The PSoC Core
The PSoC Core is a powerful engine that supports a rich fea-
ture set. The core includes a CPU, memory, clocks, and config-
urable GPIO (General Purpose IO).
The M8C CPU core is a powerful processor with speeds up to
24 MHz, providing a four MIPS 8-bit Harvard architecture micro-
processor. The CPU utilizes an interrupt controller with up to 20
vectors, to simplify programming of real time embedded events.
Program execution is timed and protected using the included
Sleep and Watch Dog Timers (WDT).
Memory encompasses 16K of Flash for program storage, 1K of
SRAM for data storage, and up to 2K of EEPROM emulated
using the Flash. Program Flash utilizes four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The PSoC device incorporates flexible internal clock genera-
tors, including a 24 MHz IMO (internal main oscillator) accurate
to 8% over temperature and voltage. The 24 MHz IMO can also
be doubled to 48 MHz for use by the digital system. A low
power 32 kHz ILO (internal low speed oscillator) is provided for
the Sleep timer and WDT. The clocks, together with program-
mable clock dividers (as a System Resource), provide the flexi-
bility to integrate almost any timing requirement into the PSoC
device. In USB systems, the IMO will self-tune to ± 0.25% accu-
racy for USB communication.
PSoC GPIOs provide connection to the CPU, digital and analog
resources of the device. Each pin’s drive mode may be selected
from eight options, allowing great flexibility in external interfac-
ing. Every pin also has the capability to generate a system inter-
rupt on high level, low level, and change from last read.
The Digital System
The Digital System is composed of 4 digital PSoC blocks. Each
block is an 8-bit resource that can be used alone or combined
with other blocks to form 8, 16, 24, and 32-bit peripherals, which
are called user module references.
Digital System Block Diagram
Digital peripheral configurations include those listed below.
■
Full-Speed USB (12 Mbps)
■
PWMs (8 to 32 bit)
■
PWMs with Dead band (8 to 24 bit)
■
Counters (8 to 32 bit)
■
Timers (8 to 32 bit)
■
UART 8 bit with selectable parity
■
SPI master and slave
■
I2C slave and multi-master
■
Cyclical Redundancy Checker/Generator (8 to 32 bit)
■
IrDA
■
Pseudo Random Sequence Generators (8 to 32 bit)
The digital blocks can be connected to any GPIO through a
series of global buses that can route any signal to any pin. The
buses also allow for signal multiplexing and for performing logic
operations. This configurability frees your designs from the con-
straints of a fixed peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies by PSoC device family. This allows you the opti-
mum choice of system resources for your application. Family
resources are shown in the table titled
“PSoC Device Charac-
teristics” on page 3
.
The Analog System
The Analog System is composed of 6 configurable blocks, each
comprised of an opamp circuit allowing the creation of complex
analog signal flows. Analog peripherals are very flexible and
can be customized to support specific application requirements.
Some of the more common PSoC analog functions (most avail-
able as user modules) are listed below.
■
Analog-to-digital converters (up to 2, with 6- to 14-bit resolu-
tion, selectable as Incremental, Delta Sigma, and SAR)
■
Filters (2 and 4 pole band-pass, low-pass, and notch)
■
Amplifiers (up to 2, with selectable gain to 48x)
■
Instrumentation amplifiers (1 with selectable gain to 93x)
■
Comparators (up to 2, with 16 selectable thresholds)
■
DACs (up to 2, with 6- to 9-bit resolution)
■
Multiplying DACs (up to 2, with 6- to 9-bit resolution)
■
High current output drivers (two with 30 mA drive as a PSoC
Core Resource)
■
1.3V reference (as a System Resource)
■
DTMF Dialer
■
Modulators
■
Correlators
■
Peak Detectors
■
Many other topologies possible
DIGITAL SYSTEM
Digital PSoC Block Array
To System Bus
Digital Clocks
From Core
To Analog
System
8
R
C
R
C
8
8
8
Row 0
DBB00
DBB01
DCB02
DCB03
4
4
GIE[7:0]
GIO[7:0]
GOE[7:0]
GOO[7:0]
Global Digital
Interconnect
Port 1
Port 0
Port 3
Port 2
Port 5
Port 4
Port 7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY8C24794-SPPVX | Environmentally sealed limit switch with Leadwire termination, Rotary Roller Lever actuation, Double Pole Double Throw (DPDT) Circuitry, 5 A (Resistive) ampere rating at 28 Vdc, Military Part Number MS21320-2 |
| CY8C24794-SPPX | PSoCTM Mixed-Signal Array |
| CY8C24794-SPC | PSoCTM Mixed-Signal Array |
| CY8C24794-SPSX | PSoCTM Mixed-Signal Array |
| CY8C27543-24AXI | PSoC Mixed Signal Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C24794-SPPVX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPPX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPSX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24894 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC㈢ Mixed-Signal Array |
| CY8C24894_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Automotive PSoC Programmable System-on-Chip Low power at high speed |
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