參數(shù)資料
型號： CYK256K16SCBU-70BVXI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 4-Mbit (256K x 16) Pseudo Static RAM
中文描述： 256K X 16 PSEUDO STATIC RAM, 70 ns, PBGA48
封裝： 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
文件頁數(shù)： 3/10頁
文件大?。?/td> 307K
代理商： CYK256K16SCBU-70BVXI
CYK256K16SCCB
Document #: 38-05526 Rev. *H
Page 3 of 10
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied ..............................................–40°C to +85°C
Supply Voltage to Ground Potential ................
0.4V to 4.6V
DC Voltage Applied to Outputs
in High-Z State
[6, 7, 8]
.......................................
0.4V to 3.7V
DC Input Voltage
[6, 7, 8]
....................................
0.4V to 3.7V
Output Current into Outputs (LOW) ............................20 mA
Static Discharge Voltage ......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current ....................................................> 200 mA
Thermal Resistance
[9]
Operating Range
Range
Industrial
Ambient Temperature (T
A
)
25°C to +85°C
V
CC
2.7V to 3.3V
DC Electrical Characteristics
(Over the Operating Range)
Parameter
V
CC
V
OH
V
OL
V
IH
V
IL
I
IX
Description
Supply Voltage
Output HIGH Voltage I
OH
=
0.1 mA
Output LOW Voltage I
OL
= 0.1 mA
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Current
Output Leakage
Current
V
CC
Operating
Supply Current
Test Conditions
CYK256K16SCCB -55, 60, 70
Min.
Typ.
[2]
2.7
V
CC
– 0.4
Unit
V
V
V
V
V
μ
A
Max.
3.3
3.0
0.4
0.8 * V
CC
0.4
1
V
CC
+ 0.4
0.62
+1
F = 0
GND < V
IN
< Vcc
I
OZ
GND < V
OUT
< Vcc, Output
Disabled
f = f
MAX
= 1/t
RC
V
CC
= 3.3V,
1
+1
μ
A
I
CC
I
OUT
= 0 mA,
CMOS level
14 for –55
14 for –60
8 for –70
1 for all speeds 5 for all speeds
150
22 for –55
22 for –60
15 for –70
mA
f = 1 MHz
CE > V
CC
0.2V, CE
2
< 0.2V
V
IN
> V
CC
0.2V, V
IN
< 0.2V,
f = f
MAX
(Address and Data Only),
f = 0 (OE, WE, BHE and BLE)
CE > V
CC
0.2V, CE
2
< 0.2V
V
IN
> V
CC
0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.3V
I
SB1
Automatic CE
1
Power-down Current
—CMOS Inputs
250
μ
A
I
SB2
Automatic CE
1
Power-down Current
—CMOS Inputs
17
40
μ
A
Capacitance
[9]
Parameter
Description
Test Conditions
T
A
= 25°C, f = 1 MHz
V
CC
= V
CC(typ)
Max.
8
8
Unit
pF
pF
C
IN
C
OUT
Input Capacitance
Output Capacitance
Parameter
θ
JA
θ
JC
Description
Test Conditions
VFBGA Unit
55
17
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA/JESD51.
°C/W
°C/W
Notes:
6. V
IH(MAX)
= V
+ 0.5V for pulse durations less than 20 ns.
7. V
= –0.5V for pulse durations less than 20 ns.
8. Overshoot and undershoot specifications are characterized and are not 100% tested.
9. Tested initially and after design or process changes that may affect these parameters.
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