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參數(shù)資料
| 型號： | CYM1464PD-25C |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 512Kx8 Static RAM Module |
| 中文描述： | 512K X 8 MULTI DEVICE SRAM MODULE, 25 ns, DMA32 |
| 封裝： | MODULE, DIP-32 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 200K |
| 代理商： | CYM1464PD-25C |
CYM1464
Document #: 38-05272 Rev. **
Page 4 of 8
WRITE CYCLE
[5]
t
WC
t
SCS
t
AW
t
HA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
Write Cycle Time
CS LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
[4]
35
30
30
3
25
20
2
0
45
40
40
3
35
25
3
0
55
50
50
3
40
35
3
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
15
20
Switching Characteristics
Over the Operating Range (continued)
[3]
Parameter
Description
1464-35
Min.
1464-45
Min.
1464-55
Min.
Unit
Max.
Max.
Max.
Switching Waveforms
Notes:
6.
7.
8.
WE is HIGH for read cycle.
Device is continuously selected, CS = V
.
Address valid prior to or coincident with CS transition LOW.
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATAOUT
Read Cycle No. 1
[6,7]
DATA VALID
t
RC
t
ACS
t
DOE
t
LZOE
t
LZCS
HIGH IMPEDANCE
t
HZOE
t
HZCS
HIGH
IMPEDANCE
DATA OUT
OE
CS
V
CC
SUPPLY
CURRENT
50%
50%
t
PU
ICC
ISB
t
PD
Read Cycle No. 2
[6,8]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYM1464PD-30C | 512Kx8 Static RAM Module |
| CYM1464PD-35C | 512Kx8 Static RAM Module |
| CYM1464PD-45C | 512Kx8 Static RAM Module |
| CYM1464PD-55C | 512Kx8 Static RAM Module |
| CYM1471 | 1024K x 8 SRAM Module(1024K x 8 靜態(tài)RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYM1464PD-30C | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512Kx8 Static RAM Module |
| CYM1464PD-35C | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512Kx8 Static RAM Module |
| CYM1464PD-45C | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512Kx8 Static RAM Module |
| CYM1464PD-55C | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512Kx8 Static RAM Module |
| CYM1465A | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512K x 8 PDIP Static RAM |
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