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參數(shù)資料
| 型號(hào)： | DFC10U |
| 英文描述： | DUAL OUTPUT |
| 中文描述： | 雙輸出 |
| 文件頁數(shù)： | 2/3頁 |
| 文件大?。?/td> | 879K |
| 代理商： | DFC10U |
2
NOTES
(1)
All parameters measured at Tc = 25
°
C, nominal input voltage and full rated load unless otherwise
noted. Refer to the Technical Reference Section for the definition of terms, measurement circuits
and other information.
Noise is measured per Technical Reference Section. Measurement bandwidth is 0-20 MHz. RMS
noise is measured over a 0.01-1 MHz bandwidth. To simulate standard PCB decoupling practices,
output noise is measured with a 10μf tantalum and 0.01μF ceramic capacitor located 1 inch away
from the converter.
The converter may be safely operated at any load from zero to the full rating. Dynamic response of
the converter may degrade if the converter is operated with less than 25% output load.
Load regulation is defined for loading/unloading both outputs simultaneously. Load range is 25 to
100%.
Cross regulation is defined for loading/unloading one output while the other output is kept at
full load. Load range is 25 to 100%.
Short term stability is specified after a 30 minute warmup at full load, constant line and
recording the drift over a 24 hour period.
(2)
(3)
(4)
(5)
(6)
DFC10 SERIES APPLICATION NOTES:
External Capacitance Requirements
No external capacitance is required for operation of the DFC10
Series. If a capacitive input source is farther than 1” from the
converter, an additional capacitor may be required at the input
pins for proper operation. This input capacitor should have an
ESR greater than 0.25 ohms. Input capacitors with an ESR less
than 0.25 ohms may cause peaking of the input filter and actually
degrade circuit performance.
External output capacitance is not required for operation,
however it is recommended that 1 F to 10 F of tantalum and
0.001 to 0.1 F ceramic capacitance be selected for reduced system
noise. Additional output capacitance may be added for increased
filtering, but should not exceed 400 F.
DFC10 SERIES – DUAL OUTPUT
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