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參數(shù)資料
| 型號： | DP83934CVUL25 |
| 英文描述： | LAN Node Controller |
| 中文描述： | 網(wǎng)絡(luò)節(jié)點控制器 |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 240K |
| 代理商： | DP83934CVUL25 |
50 Functional Description (Continued)
513 SRAM Write Operation
A write to the SRAM can occur due to a CPU request to one
or all of the MIB attributes or due to normal updating of
attributes by the DP83957 after receiving the management
status bytes from a DP83950
In the latter case the access to the SRAM is done automati-
cally by the DP83957 In the case of a CPU request the
SRAM address must be specified in the same manner as
the read operation (refer to Section 512)
The DP83957 can write data to the SRAM one byte at a
time or it can fill the entire SRAM with the same value The
value to be written into the SRAM is specified in the Write
Data Byte register
The CPU initiates a one-byte SRAM write by setting the
ST
WR bit (D5) in Configuration Register 1
In order to fill the entire SRAM both the FILL (D3) and the
ST
WR (D5) bits must be set in Configuration Register 1
This fill-mode is used to initialize the SRAM to a common
value For example reset all the attributes to zero
The DP83957 indicates the completion of the SRAM write
operation by sending an interrupt (if enabled) to the CPU
and setting the WR
COM bit (D5) in the Interrupt Status
Register
514 SRAM Memory Map
The memory map for the DP83957 consists of two sections
Each section represents one DP83950 device as shown in
the SRAM Memory Map
For each DP83950 the map is further divided into 13 pages
where each page represents a physical port for the
DP83950 The DP83950 ID and Port number selection is
programmed into Access 2 Register
Each port page is further sub-divided into 64 locations
These locations represent the offset of the Port’s Attributes
This offset is programmed into Access 1 Register
515 SRAM Address Format
The SRAM SRA 100 address is made up by combining the
contents of Access Registers 1 and 2 This is shown in the
SRAM Address Pointer figure below
SRAM Address Pointer
TLF12437 – 5
8
相關(guān)PDF資料 |
PDF描述 |
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| DP83936AVUL20 | LAN Node Controller |
| DP83936AVUL25 | LAN Node Controller |
| DP83936AVUL33 | LAN Node Controller |
| DP83950AUP | LAN Hub Controller |
| DP83952BVQB | LAN Hub Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DP83934CVUL-25 | 功能描述:IC CTRLR ORIENT NETWORK 160PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DP83934CVUL-25/NOPB | 制造商:Texas Instruments 功能描述:Ethernet CTLR Single Chip 10Mbps 5V 160-Pin PQFP |
| DP83934CVUL-33 | 功能描述:IC CTRLR ORIENT NETWORK 160PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DP83934CVUL-33/NOPB | 制造商:Texas Instruments 功能描述:Ethernet CTLR Single Chip 10Mbps 5V 160-Pin PQFP |
| DP83934VF | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:MHz SONICTM-T Systems-Oriented Network Interface Controller with Twisted Pair Interface |
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