參數(shù)資料
型號: DS-S29804
廠商: Altera Corporation
英文描述: Stratix II EP2S60 DSP Development Board
中文描述: Stratix二EP2S60 DSP開發(fā)板
文件頁數(shù): 10/52頁
文件大?。?/td> 3817K
代理商: DS-S29804
10
Preliminary
Altera Corporation
Stratix II EP2S60 DSP Development Board Data Sheet
The Factory Design
When the Stratix II device is programmed with the factory design, LEDs
D5 through D8 behave as a binary counter that counts down to zero. This
is a power-up indication that the board is functional and the device was
successfully programmed with the
factory design.
Along with the LED counter, the factory design includes two blocks of IP
generated by the Altera NCO Compiler. One of these oscillators is
running at 10 times the frequency of the other, but both of them have the
same amplitude, covering 13 bits of dynamic range. Two sine waves
generated by these blocks are added together and the output is converted
from a 2's complement representation into unsigned integer format. This
combined sine wave signal of 14-bits dynamic range is sent to a 14-bit
D/A converter.
When the analog output of the D/A converter is connected, via the
included SMA cable, with the analog input of one of the 12-bit A/D
converters, the A/D converter’s digital output is looped back to the
Stratix II device. The design converts this loopback input from 2's
complement format to unsigned integer format. The converted loopback
data is captured by an instance of the SignalTap
II logic analyzer in the
design for display and analysis.
f
For step-by-step instructions on how to use the factory design to test the
functionality of the board, refer to the
DSP Development Kit, Stratix II
Edition Getting Started User Guide
.
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