參數(shù)資料
型號: DS87C520-QNL
英文描述: EPROM/ROM High-Speed Micro
中文描述: 存儲器/ ROM的高速微
文件頁數(shù): 32/45頁
文件大小: 1415K
代理商: DS87C520-QNL
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
32 of 45
AC ELECTRICAL CHARACTERISTICS (Note 1)
33 MHz
MIN
0
1
40
10
(Note 2)
4
55
0
VARIABLE CLOCK
MIN
0
1
1.5t
CLCL
-5
0.5t
CLCL
-5
(Note 2)
0.5t
CLCL
-11
2t
CLCL
-5
0
PARAMETER
SYMBOL
MAX
33
33
43
37
26
59
68
(Note 2)
MAX
33
33
2.5t
CLCL
-33
2t
CLCL
-24
t
CLCL
-5
3t
CLCL
-32
3.5t
CLCL
-38
(Note 2)
UNITS
External Oscillator
External Crystal
Oscillator
Frequency
1/t
CLCL
MHz
ALE Pulse Width
Port 0 Address Valid to ALE Low
Address Hold after ALE Low
ALE Low to Valid Instruction In
ALE Low to
PSEN
Low
PSEN
Pulse Width
PSEN
Low to Valid Instruction In
Input Instruction Hold after
PSEN
Input Instruction Float after
PSEN
Port 0 Address to Valid Instruction In
Port 2 Address to Valid Instruction In
PSEN
Low to Address Float
t
LHLL
t
AVLL
t
LLAX1
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ
t
AVIV1
t
AVIV2
t
PLAZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1:
All parameters apply to both commercial and industrial temperature range operation unless otherwise noted.
Specifications to -40°C are guaranteed by design and are not production tested. AC electrical characteristics are not
100% tested, but are characterized and guaranteed by design. All signals characterized with load capacitance of 80pF
except Port 0, ALE,
PSEN
,
RD
, and
WR
with 100pF. Interfacing to memory devices with float times (turn off times)
over 25ns may cause contention. This will not damage the parts, but will cause an increase in operating current.
Specifications assume a 50% duty cycle for the oscillator. Port 2 and ALE timing will change in relation to duty cycle
variation.
Address is driven strongly until ALE falls, and is then held in a weak latch until overdriven externally.
Note 2:
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