參數(shù)資料
型號: DSD1608
英文描述: 8-CHANNEL, ENHANCED MULTIFORMAT, DELTA-SIGMA, DIGITAL-TO-ANALOG CONVERTER
中文描述: 8通道,增強(qiáng)多格式,Δ-Σ,數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 19/41頁
文件大?。?/td> 293K
代理商: DSD1608
DSD1608
SLES040
JUNE 2002
www.ti.com
19
DSD1
8
t(BCH)
DBCK
t(BCL)
t(BCY)
50% of VDD
50% of VDD
tsu(D)
th(D)
SYMBOL
PARAMETERS
MIN
350(1)
MAX
UNIT
t(BCY)
t(BCH)
t(BCL)
tsu(D)
th(D)
DBCK pulse cycle time
ns
DBCK high-level time
30
ns
DBCK low-level time
30
ns
DSD1
8 setup time
10
ns
DSD1
8 hold time
10
ns
(1)2.8224 MHz = 64
×
44.1 kHz; this value is specified as a sampling rate of DSD.
Figure 26. Timing for DSD Audio Interface
Register Read/Write Operation
All read/write operations for the serial control port use 16-bit data words. Figure 27 shows the control data word
format. The most significant bit is the read/write (R/W) bit. For write operations, the R/W bit must be set to 0. For
read operations, the R/W bit must be set to 1. There are seven bits, labeled IDX[6:0], that set the register index (or
address) for the read or write operations. The least significant eight bits, D[7:0], contain the data to be written to the
register specified by IDX[6:0] or to be read from the register specified by IDX[6:0].
Figure 28 shows the functional timing diagram for writing or reading the serial control port. MS is held at a logic 1
state until a register needs to be written or read. To start the register write or read cycle, MS is set to logic 0. Sixteen
clocks are then provided on MC, corresponding to the 16 bits of the control data word on MDI and read back data
on MDO. After the eighth clock cycle has completed, the data from indexed mode control register appears on MDO
in read operation. After the sixteenth clock cycle has completed, the data is latched into the indexed mode control
register in write operations. To write or read subsequent data, MS must be set to 1 once.
MSB
R/W
IDX6
IDX5
IDX4
IDX3
IDX2
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D1
D0
LSB
Register Index (or Address)
Register Data
Figure 27. Control Data Word Format for MDI
R/W IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
R/W IDX6
MDI
MC
MS
D7
D6
D5
D4
D3
D2
D1
D0
MDO
High Impedance
High Impedance
When Read Mode is Instructed
Figure 28. Serial Control Format
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